ES2114976T3 - Disposicion de modulos de memoria. - Google Patents

Disposicion de modulos de memoria.

Info

Publication number
ES2114976T3
ES2114976T3 ES93111417T ES93111417T ES2114976T3 ES 2114976 T3 ES2114976 T3 ES 2114976T3 ES 93111417 T ES93111417 T ES 93111417T ES 93111417 T ES93111417 T ES 93111417T ES 2114976 T3 ES2114976 T3 ES 2114976T3
Authority
ES
Spain
Prior art keywords
memory
counting
logic
checking circuit
level limit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES93111417T
Other languages
English (en)
Inventor
Peter Schmidtke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Original Assignee
Alcatel Alsthom Compagnie Generale dElectricite
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Alsthom Compagnie Generale dElectricite filed Critical Alcatel Alsthom Compagnie Generale dElectricite
Application granted granted Critical
Publication of ES2114976T3 publication Critical patent/ES2114976T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Data Exchanges In Wide-Area Networks (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

SE DESCRIBE UN CIRCUITO DE SUPERVISION DE LA SITUACION DE LLENADO PARA UN COMPONENTE (10A-10G; 10H) DE MEMORIA ELECTRONICA, QUE MUESTRA UNA LOGICA (12A-12G) DE MEMORIA, ABARCANDO DE FORMA CONJUNTA BITS ALMACENADOS DE UNA CORRIENTE (D1-D7) DE DATOS GUIADA A LAS CELDAS DE UNA LONGITUD DE BIT DEFINIDA EN UNA MEMORIA (11A-11G) DE COMPONENTES (10A-10G) ELECTRONICOS. SEGUN LA INVENCION SE PROPONE QUE, LA LOGICA (12A-12G) DE MEMORIA GENERE UNA SEÑAL (CC1-CC7; CC) DE MEMORIA DE IMPULSO DE PROCESO DE CONTADO PARA CADA CELDA COMPLETA, QUE SEA GUIADA A UNA DIRECCION (30A-30G) DE CONTADO DEL CIRCUITO (20) DE SUPERVISION DE LLENADO, CUYA SITUACION DE CONTADO SE INCREMENTA A TRAVES DE LA SEÑAL (CC1-CC7; CC) DE MEMORIA-IMPULSO DE CONTADO GENERADA, MOSTRANDO EL CIRCUITO (20) DE SUPERVISION DE LLENADO UNA UNIDAD (40) DE ANALISIS, QUE DE FORMA PERIODICA CONTESTA SEGUN UNA RESPUESTA SOBRE LA SITUACION DEL EQUIPO (30A-30G) DE CONTADO, Y QUE LA LOGICA (12A-12G) DE MEMORIA DESPUES DE LA TERMINACION DE UN PROCESODE SELECCION DE UNA CELDA GENERE UNA SEÑAL (Q1-Q7; Q) DE MEMORIA-RENUNCIA, QUE SE GUIA AL EQUIPO (30A-30G) DE CONTADO, CUYO ESTADO DE CONTADO SE DISMINUYE A TRAVES DE LA SEÑAL DE MEMORIAIMPULSO DE RENUNCIA GENERADO A PARTIR DE LA LOGICA DE MEMORIA.
ES93111417T 1992-07-24 1993-07-16 Disposicion de modulos de memoria. Expired - Lifetime ES2114976T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4224421A DE4224421A1 (de) 1992-07-24 1992-07-24 Füllstandsüberwachungsschaltung

Publications (1)

Publication Number Publication Date
ES2114976T3 true ES2114976T3 (es) 1998-06-16

Family

ID=6463972

Family Applications (1)

Application Number Title Priority Date Filing Date
ES93111417T Expired - Lifetime ES2114976T3 (es) 1992-07-24 1993-07-16 Disposicion de modulos de memoria.

Country Status (5)

Country Link
EP (1) EP0580085B1 (es)
AT (1) ATE164256T1 (es)
AU (1) AU665428B2 (es)
DE (2) DE4224421A1 (es)
ES (1) ES2114976T3 (es)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5657289A (en) * 1995-08-30 1997-08-12 Micron Technology, Inc. Expandable data width SAM for a multiport RAM
US6487207B1 (en) 1997-02-26 2002-11-26 Micron Technology, Inc. Shared buffer memory architecture for asynchronous transfer mode switching and multiplexing technology

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4592019A (en) * 1983-08-31 1986-05-27 At&T Bell Laboratories Bus oriented LIFO/FIFO memory
DE3732937A1 (de) * 1987-09-30 1989-04-20 Philips Patentverwaltung Schaltungsanordnung zur vermeidung von ueberlast in einem breitband-vermittlungssystem
ATE149069T1 (de) * 1989-09-29 1997-03-15 Siemens Ag Schaltungsanordnung zum ermitteln der einer atm- vermittlungsanlage im zuge von virtuellen verbindungen jeweils zugeführten nachrichtensignalmenge und zur überprüfung der einhaltung festgelegter bitraten
DE4012768A1 (de) * 1990-04-21 1991-10-24 Philips Patentverwaltung Koppelelement

Also Published As

Publication number Publication date
AU665428B2 (en) 1996-01-04
AU4187693A (en) 1994-01-27
DE4224421A1 (de) 1994-01-27
ATE164256T1 (de) 1998-04-15
EP0580085B1 (de) 1998-03-18
EP0580085A3 (en) 1995-12-20
EP0580085A2 (de) 1994-01-26
DE59308271D1 (de) 1998-04-23

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