ES415010A1 - Arrangement for indicating abnormal programme execution in a computer - Google Patents

Arrangement for indicating abnormal programme execution in a computer

Info

Publication number
ES415010A1
ES415010A1 ES415010A ES415010A ES415010A1 ES 415010 A1 ES415010 A1 ES 415010A1 ES 415010 A ES415010 A ES 415010A ES 415010 A ES415010 A ES 415010A ES 415010 A1 ES415010 A1 ES 415010A1
Authority
ES
Spain
Prior art keywords
program
arrangement
positions
sectors
priority levels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES415010A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of ES415010A1 publication Critical patent/ES415010A1/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored program
    • H04Q3/54575—Software application
    • H04Q3/54591—Supervision, e.g. fault localisation, traffic measurements, avoiding errors, failure recovery, monitoring, statistical analysis

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Debugging And Monitoring (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Alarm Systems (AREA)

Abstract

An arrangement for indicating abnormal program execution in a treatment control computer operating in real time at different priority levels, each consisting of a number of program sectors, characterized in that the arrangement comprises a register (ILR) with a position for each of the priority levels whose positions indicate by their status that operation is taking place on the respective priority level, a first binary counter (RA) for each of the priority levels and a second counter Binary (RAx) for each of such program sectors at the levels whose execution is to be monitored, and a time pulse arrangement (CL) intended to increment these counters in steps upstream, circuits (01, 02, MV) logical to make possible, depending on the priority level treated and the program sectors treated, respectively, the upward increase in dich the counters by means of the time signals coming from said time pulse arrangement (CL), a control register (CHR) whose different positions correspond to predetermined priority levels and program sectors, respectively, and connections between selected positions of said binary counters and associated control register positions to provide, when a predetermined computation position has been reached by activating the respective control register positions, output signals to the central processing unit (CPU) of the computer to initiate a control program that eliminates abnormal program execution. (Machine-translation by Google Translate, not legally binding)
ES415010A 1972-05-23 1973-05-22 Arrangement for indicating abnormal programme execution in a computer Expired ES415010A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE666172A SE364579B (en) 1972-05-23 1972-05-23

Publications (1)

Publication Number Publication Date
ES415010A1 true ES415010A1 (en) 1976-02-16

Family

ID=20269282

Family Applications (1)

Application Number Title Priority Date Filing Date
ES415010A Expired ES415010A1 (en) 1972-05-23 1973-05-22 Arrangement for indicating abnormal programme execution in a computer

Country Status (13)

Country Link
JP (1) JPS4943545A (en)
BR (1) BR7303757D0 (en)
CA (1) CA982269A (en)
ES (1) ES415010A1 (en)
FI (1) FI56754C (en)
FR (1) FR2186154A5 (en)
GB (1) GB1422603A (en)
HU (1) HU167446B (en)
IT (1) IT987815B (en)
NO (1) NO133860C (en)
PL (1) PL97264B1 (en)
SE (1) SE364579B (en)
YU (1) YU129773A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111886554A (en) * 2018-03-22 2020-11-03 蒂森克虏伯普利斯坦股份公司 Method for diagnosing a functional feature using discrete values or discrete value classes on the input or output side

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4369493A (en) 1979-05-14 1983-01-18 Metropolitan Life Insurance Company Response time monitor
JPS56120840A (en) * 1980-02-26 1981-09-22 Kayaba Ind Co Ltd Hydraulic buffer
JPH10198583A (en) * 1997-01-10 1998-07-31 Nec Corp Detection/processing system/method for idle running process
CN108415407B (en) * 2018-03-14 2023-11-03 江苏徐工工程机械研究院有限公司 Leveling fault detection controller, paver leveling control device and method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111886554A (en) * 2018-03-22 2020-11-03 蒂森克虏伯普利斯坦股份公司 Method for diagnosing a functional feature using discrete values or discrete value classes on the input or output side
CN111886554B (en) * 2018-03-22 2024-04-16 蒂森克虏伯普利斯坦股份公司 Methods for diagnosing the characteristics of functions that use discrete values or discrete value classes on the input or output side
US12037060B2 (en) 2018-03-22 2024-07-16 Thyssenkrupp Presta Ag Method for diagnosing a functionality using discrete values or discrete classes of values on the input or output side

Also Published As

Publication number Publication date
AU5531973A (en) 1974-11-07
DE2322349B2 (en) 1976-02-12
IT987815B (en) 1975-03-20
JPS4943545A (en) 1974-04-24
NO133860B (en) 1976-03-29
HU167446B (en) 1975-10-28
FR2186154A5 (en) 1974-01-04
DE2322349A1 (en) 1973-11-29
SE364579B (en) 1974-02-25
BR7303757D0 (en) 1974-07-11
GB1422603A (en) 1976-01-28
FI56754B (en) 1979-11-30
PL97264B1 (en) 1978-02-28
YU129773A (en) 1980-04-30
CA982269A (en) 1976-01-20
NO133860C (en) 1976-07-07
FI56754C (en) 1980-03-10

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