ES8401272A1 - "un registro de procesamiento para sistemas de procesamiento de una senal digital". - Google Patents

"un registro de procesamiento para sistemas de procesamiento de una senal digital".

Info

Publication number
ES8401272A1
ES8401272A1 ES516759A ES516759A ES8401272A1 ES 8401272 A1 ES8401272 A1 ES 8401272A1 ES 516759 A ES516759 A ES 516759A ES 516759 A ES516759 A ES 516759A ES 8401272 A1 ES8401272 A1 ES 8401272A1
Authority
ES
Spain
Prior art keywords
register
digital signal
signal processing
processing
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES516759A
Other languages
English (en)
Other versions
ES516759A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES8401272A1 publication Critical patent/ES8401272A1/es
Publication of ES516759A0 publication Critical patent/ES516759A0/es
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/14Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141Discrete Fourier transforms
    • G06F17/142Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Discrete Mathematics (AREA)
  • Complex Calculations (AREA)

Abstract

REGISTRO DE PROCESAMIENTO PARA SISTEMAS DE PROCESAMIENTO DE UNA SEÑAL DIGITAL.COMPRENDE, DENTRO DEL CIRCUITO INTEGRADO (10), UN REGISTRO DE ALMACENAMIENTO PRINCIPAL (11), UN BUS DE SALIDA (12), UN REGISTRO DE CALCULO (13), UN REGISTRO DE CONTROL (14), UN REGISTRO DE ALMACENAMIENTO INDEPENDIENTE (15), UN REGISTRO SUMADOR/RESTADOR (17), UN REGISTRO DE RETARDO (18) Y UN MULTIPLEXOR SERIE (19).
ES516759A 1981-10-22 1982-10-22 "un registro de procesamiento para sistemas de procesamiento de una senal digital". Granted ES516759A0 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/313,916 US4488255A (en) 1981-10-22 1981-10-22 Processing register apparatus for use in digital signal processing systems

Publications (2)

Publication Number Publication Date
ES8401272A1 true ES8401272A1 (es) 1983-12-16
ES516759A0 ES516759A0 (es) 1983-12-16

Family

ID=23217736

Family Applications (1)

Application Number Title Priority Date Filing Date
ES516759A Granted ES516759A0 (es) 1981-10-22 1982-10-22 "un registro de procesamiento para sistemas de procesamiento de una senal digital".

Country Status (5)

Country Link
US (1) US4488255A (es)
EP (1) EP0091491A4 (es)
JP (1) JPS58501741A (es)
ES (1) ES516759A0 (es)
WO (1) WO1983001522A1 (es)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4698680A (en) * 1985-12-24 1987-10-06 Rca Corporation Digital correlation apparatus as for a television deghosting system
WO1988008574A1 (fr) * 1987-04-28 1988-11-03 Fujitsu Ten Limited Procede et appareil pour le transfert de donnees
US5204962A (en) * 1989-11-30 1993-04-20 Mitsubishi Denki Kabushiki Kaisha Processor with preceding operation circuit connected to output of data register
SE9904685D0 (sv) * 1999-12-17 1999-12-17 Switchcore Ab A programmable packet decoder

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4016540A (en) * 1970-12-28 1977-04-05 Gilbert Peter Hyatt Apparatus and method for providing interactive audio communication
US3875391A (en) * 1973-11-02 1975-04-01 Raytheon Co Pipeline signal processor
DE2541510A1 (de) * 1974-09-17 1976-03-25 Westinghouse Electric Corp Verarbeitungssystem fuer diskrete analogsignale
FR2296221A1 (fr) * 1974-12-27 1976-07-23 Ibm France Systeme de traitement du signal
US4130883A (en) * 1975-10-14 1978-12-19 Bethlehem Steel Corporation Data communication system having bidirectional station interfaces
US4291374A (en) * 1978-07-24 1981-09-22 Pitney Bowes Inc. Mailing system
US4374429A (en) * 1980-06-27 1983-02-15 International Business Machines Corporation Information transfer system wherein bidirectional transfer is effected utilizing unidirectional bus in conjunction with key depression signal line

Also Published As

Publication number Publication date
JPS58501741A (ja) 1983-10-13
US4488255A (en) 1984-12-11
EP0091491A1 (en) 1983-10-19
ES516759A0 (es) 1983-12-16
WO1983001522A1 (en) 1983-04-28
EP0091491A4 (en) 1985-07-30

Similar Documents

Publication Publication Date Title
US4754421A (en) Multiple precision multiplication device
US4785421A (en) Normalizing circuit
EP0198470B1 (en) Arithmetic unit with simple overflow detection system
KR950033803A (ko) 다중 비트 시프트 장치, 이것을 이용한 데이타 프로세서, 및 다중 비트 시프트 방법
CA1250666C (es)
EP0206762A2 (en) Digital electronic multiplier circuits
JPS6470827A (en) Apparatus and method for performing shift operation within multipler array circuit
EP0540175B1 (en) Digital signal processing apparatus
US3641331A (en) Apparatus for performing arithmetic operations on numbers using a multiple generating and storage technique
ES8401272A1 (es) "un registro de procesamiento para sistemas de procesamiento de una senal digital".
GB1061545A (en) Arithmetic section
GB991734A (en) Improvements in digital calculating devices
US3039688A (en) Digital incremental computer
GB1160612A (en) Improvements in or relating to Automatically Controlled Calculating Apparatus
JPS57113144A (en) Stored program computer
US4323978A (en) Arithmetic element based on the DDA principle
US3609696A (en) Programmed arrangement for serial handling of numerical information
SU450169A1 (ru) Устройство дл умножени
SU962927A1 (ru) Конвейерное устройство дл вычислени функции Y=е @
JPS575153A (en) Information processor
SU491946A1 (ru) Устройство дл извлечени корн -ой степени
SU1176322A1 (ru) Вычислительное устройство
SU1103236A1 (ru) Устройство дл загрузки данных
SU1179326A1 (ru) Конвейерное устройство дл вычислени функции @
SU1087990A1 (ru) Устройство дл возведени в степень