ES8405178A1 - Sistema de procesado de datos. - Google Patents

Sistema de procesado de datos.

Info

Publication number
ES8405178A1
ES8405178A1 ES523596A ES523596A ES8405178A1 ES 8405178 A1 ES8405178 A1 ES 8405178A1 ES 523596 A ES523596 A ES 523596A ES 523596 A ES523596 A ES 523596A ES 8405178 A1 ES8405178 A1 ES 8405178A1
Authority
ES
Spain
Prior art keywords
data processing
processing system
diagnosis function
circuit
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES523596A
Other languages
English (en)
Other versions
ES523596A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of ES8405178A1 publication Critical patent/ES8405178A1/es
Publication of ES523596A0 publication Critical patent/ES523596A0/es
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G06F11/2736—Tester hardware, i.e. output processing circuits using a dedicated service processor for test
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

CIRCUITO DE DIAGNOSTICO EN UN SISTEMA DE PROCESO DE DATOS.INCLUYE UNA PRIMERA UNIDAD PARA ENVIAR UNA INFORMACION DE DIRECCION DE EXPLORACION, CON EL FIN DE SELECCIONAR UN CIRCUITO QUE HA DE SER DIAGNOSTICADO, Y UNA SEGUNDA UNIDAD, QUE INCLUYE DICHO CIRCUITO Y QUE ENVIA A LA PRIMERA EL ESTADO DEL MISMO, SELECCIONADO POR LA INFORMACION DE DIRECCION DE EXPLORACION RECIBIDA.
ES523596A 1982-06-25 1983-06-25 Sistema de procesado de datos. Granted ES523596A0 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57109605A JPS58225453A (ja) 1982-06-25 1982-06-25 診断回路の誤り検出方式

Publications (2)

Publication Number Publication Date
ES8405178A1 true ES8405178A1 (es) 1984-05-16
ES523596A0 ES523596A0 (es) 1984-05-16

Family

ID=14514516

Family Applications (1)

Application Number Title Priority Date Filing Date
ES523596A Granted ES523596A0 (es) 1982-06-25 1983-06-25 Sistema de procesado de datos.

Country Status (9)

Country Link
US (1) US4698754A (es)
EP (1) EP0102150B1 (es)
JP (1) JPS58225453A (es)
KR (1) KR870000114B1 (es)
AU (1) AU547305B2 (es)
BR (1) BR8303397A (es)
CA (1) CA1208795A (es)
DE (1) DE3381152D1 (es)
ES (1) ES523596A0 (es)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4660198A (en) * 1985-04-15 1987-04-21 Control Data Corporation Data capture logic for VLSI chips
US4799222A (en) * 1987-01-07 1989-01-17 Honeywell Bull Inc. Address transform method and apparatus for transferring addresses
US4823347A (en) * 1987-05-18 1989-04-18 International Business Machines Corporation Deferred parity checking of control signals across a bidirectional data transmission interface
US4872172A (en) * 1987-11-30 1989-10-03 Tandem Computers Incorporated Parity regeneration self-checking
JPH02232736A (ja) * 1989-02-03 1990-09-14 Digital Equip Corp <Dec> システムモジュール間のｄｒａｍ制御信号のエラー検査を行なう方法及び手段
US5153882A (en) * 1990-03-29 1992-10-06 National Semiconductor Corporation Serial scan diagnostics apparatus and method for a memory device
WO1992005486A1 (en) * 1990-09-14 1992-04-02 Digital Equipment Corporation Method and means for error checking of dram-control signals between system modules
JP2654272B2 (ja) * 1991-07-10 1997-09-17 富士通株式会社 論理回路試験装置
GB2265736B (en) * 1992-04-04 1996-05-15 Motorola Israel Ltd Bus analyser for modular computer system
US6128758A (en) * 1998-05-20 2000-10-03 National Semiconductor Corporation Modular re-useable bus architecture
KR100300861B1 (ko) * 1998-06-27 2001-09-06 박종섭 에러 검출 장치
CN113204446B (zh) * 2020-02-03 2022-09-23 瑞昱半导体股份有限公司 寄存器资料检查装置与方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3735351A (en) * 1971-06-29 1973-05-22 Hydril Co Remote station address verification using address conditioned encoding
GB1403527A (en) * 1971-11-12 1975-08-28 Plessey Co Ltd Data transmission systems
JPS5352029A (en) * 1976-10-22 1978-05-12 Fujitsu Ltd Arithmetic circuit unit
JPS5853774B2 (ja) * 1978-12-29 1983-12-01 株式会社日立製作所 情報処理装置
US4404519A (en) * 1980-12-10 1983-09-13 International Business Machine Company Testing embedded arrays in large scale integrated circuits
US4486883A (en) * 1982-02-03 1984-12-04 Clarion Co., Ltd. Address check system

Also Published As

Publication number Publication date
AU1620883A (en) 1984-01-05
EP0102150B1 (en) 1990-01-24
KR870000114B1 (ko) 1987-02-11
EP0102150A3 (en) 1985-10-09
BR8303397A (pt) 1984-02-07
ES523596A0 (es) 1984-05-16
EP0102150A2 (en) 1984-03-07
KR840005229A (ko) 1984-11-05
US4698754A (en) 1987-10-06
DE3381152D1 (de) 1990-03-01
JPS58225453A (ja) 1983-12-27
JPS6226734B2 (es) 1987-06-10
CA1208795A (en) 1986-07-29
AU547305B2 (en) 1985-10-17

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19970401