FR2282162A1 - Procede de realisation de dispositifs semiconducteurs - Google Patents

Procede de realisation de dispositifs semiconducteurs

Info

Publication number
FR2282162A1
FR2282162A1 FR7427905A FR7427905A FR2282162A1 FR 2282162 A1 FR2282162 A1 FR 2282162A1 FR 7427905 A FR7427905 A FR 7427905A FR 7427905 A FR7427905 A FR 7427905A FR 2282162 A1 FR2282162 A1 FR 2282162A1
Authority
FR
France
Prior art keywords
semiconductor devices
semiconductor
devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7427905A
Other languages
English (en)
Other versions
FR2282162B1 (fr
Inventor
Michel De Brebisson
Alain Monfret
Jean-Michel Decrouen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Radiotechnique Compelec RTC SA
Original Assignee
Radiotechnique Compelec RTC SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Radiotechnique Compelec RTC SA filed Critical Radiotechnique Compelec RTC SA
Priority to FR7427905A priority Critical patent/FR2282162A1/fr
Priority to US05/598,015 priority patent/US4009057A/en
Priority to DE2534132A priority patent/DE2534132C3/de
Priority to CA233,170A priority patent/CA1035471A/fr
Priority to NL7509464A priority patent/NL7509464A/xx
Priority to GB33182/75A priority patent/GB1515184A/en
Priority to JP50096322A priority patent/JPS5142476A/ja
Publication of FR2282162A1 publication Critical patent/FR2282162A1/fr
Application granted granted Critical
Publication of FR2282162B1 publication Critical patent/FR2282162B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0112Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/501Marks applied to devices, e.g. for alignment or identification for use before dicing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/037Diffusion-deposition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/102Mask alignment
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/106Masks, special
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/136Resistors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/151Simultaneous diffusion
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/975Substrate or mask aligning feature
FR7427905A 1974-08-12 1974-08-12 Procede de realisation de dispositifs semiconducteurs Granted FR2282162A1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR7427905A FR2282162A1 (fr) 1974-08-12 1974-08-12 Procede de realisation de dispositifs semiconducteurs
US05/598,015 US4009057A (en) 1974-08-12 1975-07-22 Method of manufacturing a semiconductor device
DE2534132A DE2534132C3 (de) 1974-08-12 1975-07-31 Verfahren zur Herstellung einer Halbleiteranordnung
CA233,170A CA1035471A (fr) 1974-08-12 1975-08-07 Mode de fabrication de semiconducteurs par empreinte de masque
NL7509464A NL7509464A (nl) 1974-08-12 1975-08-08 Werkwijze voor het vervaardigen van een half- geleiderinrichting.
GB33182/75A GB1515184A (en) 1974-08-12 1975-08-08 Semiconductor device manufacture
JP50096322A JPS5142476A (en) 1974-08-12 1975-08-09 Handotaisochino seizohoho

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7427905A FR2282162A1 (fr) 1974-08-12 1974-08-12 Procede de realisation de dispositifs semiconducteurs

Publications (2)

Publication Number Publication Date
FR2282162A1 true FR2282162A1 (fr) 1976-03-12
FR2282162B1 FR2282162B1 (fr) 1978-04-28

Family

ID=9142340

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7427905A Granted FR2282162A1 (fr) 1974-08-12 1974-08-12 Procede de realisation de dispositifs semiconducteurs

Country Status (7)

Country Link
US (1) US4009057A (fr)
JP (1) JPS5142476A (fr)
CA (1) CA1035471A (fr)
DE (1) DE2534132C3 (fr)
FR (1) FR2282162A1 (fr)
GB (1) GB1515184A (fr)
NL (1) NL7509464A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0183624A3 (fr) * 1984-11-28 1988-03-02 Fairchild Semiconductor Corporation Procédé de fabrication de circuits intégrés bipolaires analogiques à haute densité d'intégration à grande vitesse
EP0339315A1 (fr) * 1988-04-28 1989-11-02 Fujitsu Limited Méthode de fabrication de dispositifs semi-conducteurs protégés contre la contamination due aux étapes de configuration

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4151019A (en) * 1974-12-27 1979-04-24 Tokyo Shibaura Electric Co., Ltd. Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
US4153487A (en) * 1974-12-27 1979-05-08 Tokyo Shibaura Electric Co., Ltd. Method of manufacturing intergrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
US4110126A (en) * 1977-08-31 1978-08-29 International Business Machines Corporation NPN/PNP Fabrication process with improved alignment
US4118250A (en) * 1977-12-30 1978-10-03 International Business Machines Corporation Process for producing integrated circuit devices by ion implantation
US4201800A (en) * 1978-04-28 1980-05-06 International Business Machines Corp. Hardened photoresist master image mask process
US4244752A (en) * 1979-03-06 1981-01-13 Burroughs Corporation Single mask method of fabricating complementary integrated circuits
US5219770A (en) * 1983-11-30 1993-06-15 Fujitsu Limited Method for fabricating a MISFET including a common contact window
US4829018A (en) * 1986-06-27 1989-05-09 Wahlstrom Sven E Multilevel integrated circuits employing fused oxide layers
US4843026A (en) * 1987-09-24 1989-06-27 Intel Corporation Architecture modification for improved ROM security
JPH06101540B2 (ja) * 1989-05-19 1994-12-12 三洋電機株式会社 半導体集積回路の製造方法
EP0562309B1 (fr) * 1992-03-25 2002-06-12 Texas Instruments Incorporated Procédé planaire utilisant des marques d'alignement communes pour les implantations de puit
KR102762200B1 (ko) * 2022-10-27 2025-02-03 이재호 배수구 커버

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2160667A1 (fr) * 1971-11-20 1973-06-29 Itt

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3697318A (en) * 1967-05-23 1972-10-10 Ibm Monolithic integrated structure including fabrication thereof
US3640782A (en) * 1967-10-13 1972-02-08 Gen Electric Diffusion masking in semiconductor preparation
US3560278A (en) * 1968-11-29 1971-02-02 Motorola Inc Alignment process for fabricating semiconductor devices
GB1355806A (en) * 1970-12-09 1974-06-05 Mullard Ltd Methods of manufacturing a semiconductor device
JPS5538823B2 (fr) * 1971-12-22 1980-10-07
GB1384028A (en) * 1972-08-21 1974-02-12 Hughes Aircraft Co Method of making a semiconductor device
US3793088A (en) * 1972-11-15 1974-02-19 Bell Telephone Labor Inc Compatible pnp and npn devices in an integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2160667A1 (fr) * 1971-11-20 1973-06-29 Itt

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0183624A3 (fr) * 1984-11-28 1988-03-02 Fairchild Semiconductor Corporation Procédé de fabrication de circuits intégrés bipolaires analogiques à haute densité d'intégration à grande vitesse
EP0339315A1 (fr) * 1988-04-28 1989-11-02 Fujitsu Limited Méthode de fabrication de dispositifs semi-conducteurs protégés contre la contamination due aux étapes de configuration
US5132252A (en) * 1988-04-28 1992-07-21 Fujitsu Limited Method for fabricating semiconductor devices that prevents pattern contamination

Also Published As

Publication number Publication date
DE2534132C3 (de) 1978-06-01
DE2534132A1 (de) 1976-02-26
GB1515184A (en) 1978-06-21
DE2534132B2 (de) 1977-10-13
US4009057A (en) 1977-02-22
CA1035471A (fr) 1978-07-25
JPS5319900B2 (fr) 1978-06-23
FR2282162B1 (fr) 1978-04-28
NL7509464A (nl) 1976-02-16
JPS5142476A (en) 1976-04-10

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Legal Events

Date Code Title Description
ST Notification of lapse