FR2320632A1 - Ameliorations apportees aux procedes de fabrication des dispositifs a semi-conducteurs, notamment pour l'autoalignement de la porte d'un transistor a effet de champ - Google Patents

Ameliorations apportees aux procedes de fabrication des dispositifs a semi-conducteurs, notamment pour l'autoalignement de la porte d'un transistor a effet de champ

Info

Publication number
FR2320632A1
FR2320632A1 FR7624034A FR7624034A FR2320632A1 FR 2320632 A1 FR2320632 A1 FR 2320632A1 FR 7624034 A FR7624034 A FR 7624034A FR 7624034 A FR7624034 A FR 7624034A FR 2320632 A1 FR2320632 A1 FR 2320632A1
Authority
FR
France
Prior art keywords
alignment
door
self
effect transistor
semiconductor devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7624034A
Other languages
English (en)
Other versions
FR2320632B3 (fr
Inventor
Marina Buiatti
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Leonardo SpA
Original Assignee
Selenia Industrie Elettroniche Associate SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Selenia Industrie Elettroniche Associate SpA filed Critical Selenia Industrie Elettroniche Associate SpA
Publication of FR2320632A1 publication Critical patent/FR2320632A1/fr
Application granted granted Critical
Publication of FR2320632B3 publication Critical patent/FR2320632B3/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/061—Manufacture or treatment of FETs having Schottky gates
    • H10D30/0612—Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/87—FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/012—Manufacture or treatment of electrodes comprising a Schottky barrier to a semiconductor
    • H10D64/0124—Manufacture or treatment of electrodes comprising a Schottky barrier to a semiconductor to Group III-V semiconductors
    • H10D64/0125—Manufacture or treatment of electrodes comprising a Schottky barrier to a semiconductor to Group III-V semiconductors characterised by the sectional shape, e.g. T or inverted T
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/139—Schottky barrier
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/143—Shadow masking
FR7624034A 1975-08-08 1976-08-06 Ameliorations apportees aux procedes de fabrication des dispositifs a semi-conducteurs, notamment pour l'autoalignement de la porte d'un transistor a effet de champ Granted FR2320632A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT50889/75A IT1041193B (it) 1975-08-08 1975-08-08 Perfezionamenti nei procedimenti per la fabbricazione di dispositivi a semiconduttor

Publications (2)

Publication Number Publication Date
FR2320632A1 true FR2320632A1 (fr) 1977-03-04
FR2320632B3 FR2320632B3 (fr) 1979-05-04

Family

ID=11274039

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7624034A Granted FR2320632A1 (fr) 1975-08-08 1976-08-06 Ameliorations apportees aux procedes de fabrication des dispositifs a semi-conducteurs, notamment pour l'autoalignement de la porte d'un transistor a effet de champ

Country Status (5)

Country Link
US (1) US4048712A (fr)
DE (1) DE2635369A1 (fr)
FR (1) FR2320632A1 (fr)
GB (1) GB1510293A (fr)
IT (1) IT1041193B (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2824026A1 (de) * 1978-06-01 1979-12-20 Licentia Gmbh Verfahren zum herstellen eines sperrschicht-feldeffekttransistors
EP0106174A3 (en) * 1982-09-16 1986-07-23 Hitachi, Ltd. Self-aligned manufacture of fet

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2348574A1 (fr) * 1976-04-16 1977-11-10 Thomson Csf Procede de realisation d'une source d'ondes millimetriques et adaptation d'une telle source a la transmission par guide d'ondes
US4253229A (en) * 1978-04-27 1981-03-03 Xerox Corporation Self-aligned narrow gate MESFET process
DE2821975C2 (de) * 1978-05-19 1983-01-27 Siemens AG, 1000 Berlin und 8000 München Metall-Halbleiter-Feldeffekttransistor (MESFET) und Verfahren zu dessen Herstellung
GB1602498A (en) * 1978-05-31 1981-11-11 Secr Defence Fet devices and their fabrication
GB1603260A (en) * 1978-05-31 1981-11-25 Secr Defence Devices and their fabrication
GB1601059A (en) * 1978-05-31 1981-10-21 Secr Defence Fet devices and their fabrication
US4213840A (en) * 1978-11-13 1980-07-22 Avantek, Inc. Low-resistance, fine-line semiconductor device and the method for its manufacture
US4358891A (en) * 1979-06-22 1982-11-16 Burroughs Corporation Method of forming a metal semiconductor field effect transistor
US4379005A (en) * 1979-10-26 1983-04-05 International Business Machines Corporation Semiconductor device fabrication
US4310570A (en) * 1979-12-20 1982-01-12 Eaton Corporation Field-effect transistors with micron and submicron gate lengths
US4325181A (en) * 1980-12-17 1982-04-20 The United States Of America As Represented By The Secretary Of The Navy Simplified fabrication method for high-performance FET
FR2496982A1 (fr) 1980-12-24 1982-06-25 Labo Electronique Physique Procede de fabrication de transistors a effet de champ, a grille auto-alignee, et transistors ainsi obtenus
GB2127751B (en) * 1982-10-06 1986-04-23 Plessey Co Plc Producing narrow features in electrical devices
US4400257A (en) * 1982-12-21 1983-08-23 Rca Corporation Method of forming metal lines
US4586063A (en) * 1984-04-02 1986-04-29 Oki Electric Industry Co., Ltd. Schottky barrier gate FET including tungsten-aluminum alloy
US4985369A (en) * 1987-01-21 1991-01-15 Ford Microelectronics, Inc. Method for making self-aligned ohmic contacts
US4829347A (en) * 1987-02-06 1989-05-09 American Telephone And Telegraph Company, At&T Bell Laboratories Process for making indium gallium arsenide devices
US4927782A (en) * 1989-06-27 1990-05-22 The United States Of America As Represented By The Secretary Of The Navy Method of making self-aligned GaAs/AlGaAs FET's
US5011785A (en) * 1990-10-30 1991-04-30 The United States Of America As Represented By The Secretary Of The Navy Insulator assisted self-aligned gate junction

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2027546B1 (fr) * 1968-11-22 1976-03-19 Tokyo Shibaura Electric Co
DE2037589C3 (de) * 1970-07-29 1974-02-21 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zum Herstellen eines Sperrschicht-Feldeffekttransistors
US3711745A (en) * 1971-10-06 1973-01-16 Microwave Ass Inc Low barrier height gallium arsenide microwave schottky diodes using gold-germanium alloy

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2824026A1 (de) * 1978-06-01 1979-12-20 Licentia Gmbh Verfahren zum herstellen eines sperrschicht-feldeffekttransistors
EP0106174A3 (en) * 1982-09-16 1986-07-23 Hitachi, Ltd. Self-aligned manufacture of fet

Also Published As

Publication number Publication date
FR2320632B3 (fr) 1979-05-04
IT1041193B (it) 1980-01-10
US4048712A (en) 1977-09-20
GB1510293A (en) 1978-05-10
DE2635369A1 (de) 1977-02-24

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