FR2362444A1 - Dispositif d'informatique capable d'executer plusieurs instructions en chevauchement dans le temps - Google Patents
Dispositif d'informatique capable d'executer plusieurs instructions en chevauchement dans le tempsInfo
- Publication number
- FR2362444A1 FR2362444A1 FR7725166A FR7725166A FR2362444A1 FR 2362444 A1 FR2362444 A1 FR 2362444A1 FR 7725166 A FR7725166 A FR 7725166A FR 7725166 A FR7725166 A FR 7725166A FR 2362444 A1 FR2362444 A1 FR 2362444A1
- Authority
- FR
- France
- Prior art keywords
- time
- device capable
- computer device
- several overlapping
- executing several
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
Abstract
L'invention concerne les processeurs capables d'exécuter plusieurs instructions en chevauchement dans le temps. Le dispositif de l'invention comporte essentiellement trois étages de traitement DF1-DF3 qui accomplissent respectivement les trois phases distinctes de l'exécution d'une instruction. Ces étages sont commandés par une unité de commande de microprogramme 12 dont les séquences de microprogramme sont définies par la combinaison du contenu de trois mémoires tampons 17, 18 et 19. Application aux ordinateurs de grande puissance.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB34259/76A GB1527289A (en) | 1976-08-17 | 1976-08-17 | Data processing systems |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2362444A1 true FR2362444A1 (fr) | 1978-03-17 |
| FR2362444B1 FR2362444B1 (fr) | 1984-05-25 |
Family
ID=10363418
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7725166A Granted FR2362444A1 (fr) | 1976-08-17 | 1977-08-17 | Dispositif d'informatique capable d'executer plusieurs instructions en chevauchement dans le temps |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US4187539A (fr) |
| JP (1) | JPS5324243A (fr) |
| AU (1) | AU509804B2 (fr) |
| DE (1) | DE2735814C2 (fr) |
| FR (1) | FR2362444A1 (fr) |
| GB (1) | GB1527289A (fr) |
| ZA (1) | ZA774493B (fr) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2409550A1 (fr) * | 1977-11-21 | 1979-06-15 | Burroughs Corp | Appareil d'interface de la famille des gabarits |
| EP0376004A3 (fr) * | 1988-12-30 | 1991-10-23 | International Business Machines Corporation | Mise en séquence d'opérations avec un pipeline de longueur variable |
Families Citing this family (44)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6019018B2 (ja) * | 1976-12-27 | 1985-05-14 | 富士通株式会社 | デ−タ処理システム |
| JPS5621242A (en) * | 1979-07-28 | 1981-02-27 | Fujitsu Ltd | Pipeline control method for computer operation |
| US4310880A (en) * | 1979-09-10 | 1982-01-12 | Nixdorf Computer Corporation | High-speed synchronous computer using pipelined registers and a two-level fixed priority circuit |
| US4298936A (en) * | 1979-11-15 | 1981-11-03 | Analogic Corporation | Array Processor |
| US4598358A (en) * | 1980-02-11 | 1986-07-01 | At&T Bell Laboratories | Pipelined digital signal processor using a common data and control bus |
| JPS5794853A (en) * | 1980-12-03 | 1982-06-12 | Hitachi Ltd | Data processor |
| DE3166256D1 (en) * | 1981-03-23 | 1984-10-31 | Ibm Deutschland | Device for shortening the cycle time in a data processing device |
| US4646236A (en) * | 1981-04-17 | 1987-02-24 | International Business Machines Corp. | Pipelined control apparatus with multi-process address storage |
| US4399507A (en) * | 1981-06-30 | 1983-08-16 | Ibm Corporation | Instruction address stack in the data memory of an instruction-pipelined processor |
| JPS5848146A (ja) * | 1981-09-18 | 1983-03-22 | Toshiba Corp | 命令先取り方式 |
| US4541045A (en) * | 1981-09-21 | 1985-09-10 | Racal-Milgo, Inc. | Microprocessor architecture employing efficient operand and instruction addressing |
| JPS58106636A (ja) * | 1981-12-18 | 1983-06-25 | Hitachi Ltd | パイプライン演算装置 |
| US4417039A (en) * | 1982-07-19 | 1983-11-22 | The United States Of America As Represented By The Secretary Of The Air Force | Cis-enyne aromatic and aromatic heterocyclic polymers |
| US4630230A (en) * | 1983-04-25 | 1986-12-16 | Cray Research, Inc. | Solid state storage device |
| EP0150177A1 (fr) * | 1983-07-11 | 1985-08-07 | Prime Computer, Inc. | Systeme de traitement de donnees |
| US4800486A (en) * | 1983-09-29 | 1989-01-24 | Tandem Computers Incorporated | Multiple data patch CPU architecture |
| US5093775A (en) * | 1983-11-07 | 1992-03-03 | Digital Equipment Corporation | Microcode control system for digital data processing system |
| US4812970A (en) * | 1983-11-10 | 1989-03-14 | Fujitsu Limited | Microprogram control system |
| JPS60107141A (ja) * | 1983-11-16 | 1985-06-12 | Fujitsu Ltd | プランチ制御方式 |
| GB8404480D0 (en) * | 1984-02-21 | 1984-03-28 | Int Computers Ltd | Microprogram control |
| JPH0743648B2 (ja) * | 1985-11-15 | 1995-05-15 | 株式会社日立製作所 | 情報処理装置 |
| US4783738A (en) * | 1986-03-13 | 1988-11-08 | International Business Machines Corporation | Adaptive instruction processing by array processor having processor identification and data dependent status registers in each processing element |
| US4814978A (en) * | 1986-07-15 | 1989-03-21 | Dataflow Computer Corporation | Dataflow processing element, multiprocessor, and processes |
| US5127104A (en) * | 1986-12-29 | 1992-06-30 | Dataflow Computer Corporation | Method and product involving translation and execution of programs by automatic partitioning and data structure allocation |
| JPH0760388B2 (ja) * | 1987-06-09 | 1995-06-28 | 三菱電機株式会社 | パイプライン制御回路 |
| KR970005453B1 (ko) * | 1987-12-25 | 1997-04-16 | 가부시기가이샤 히다찌세이사꾸쇼 | 고속처리에 적합한 데이타 처리장치 |
| GB8817911D0 (en) * | 1988-07-27 | 1988-09-01 | Int Computers Ltd | Data processing apparatus |
| US5333287A (en) * | 1988-12-21 | 1994-07-26 | International Business Machines Corporation | System for executing microinstruction routines by using hardware to calculate initialization parameters required therefore based upon processor status and control parameters |
| US5142638A (en) * | 1989-02-07 | 1992-08-25 | Cray Research, Inc. | Apparatus for sharing memory in a multiprocessor system |
| US4951246A (en) * | 1989-08-08 | 1990-08-21 | Cray Research, Inc. | Nibble-mode dram solid state storage device |
| US5251306A (en) * | 1990-01-16 | 1993-10-05 | Advanced Micro Devices, Inc. | Apparatus for controlling execution of a program in a computing device |
| JP2580396B2 (ja) * | 1991-01-31 | 1997-02-12 | 富士通株式会社 | パイプラインにおける分岐命令制御方式 |
| US5203003A (en) * | 1991-03-28 | 1993-04-13 | Echelon Corporation | Computer architecture for conserving power by using shared resources and method for suspending processor execution in pipeline |
| US6128721A (en) * | 1993-11-17 | 2000-10-03 | Sun Microsystems, Inc. | Temporary pipeline register file for a superpipelined superscalar processor |
| KR100186916B1 (ko) * | 1994-02-14 | 1999-05-01 | 모리시다 요이치 | 신호처리장치 |
| FR2731095B1 (fr) * | 1995-02-23 | 1997-04-30 | Dufal Frederic | Procede et dispositif de commande simultanee des etats de controle des unites d'execution d'un processeur programmable a architecture du type pipeline, notamment un processeur de traitement d'images |
| GB2365546B (en) * | 1999-12-23 | 2004-02-18 | St Microelectronics Sa | A computer system with two debug watch modes |
| GB2366006B (en) * | 1999-12-23 | 2004-06-30 | St Microelectronics Sa | A computer system with debug facility |
| US10019230B2 (en) | 2014-07-02 | 2018-07-10 | Via Alliance Semiconductor Co., Ltd | Calculation control indicator cache |
| US11061672B2 (en) | 2015-10-02 | 2021-07-13 | Via Alliance Semiconductor Co., Ltd. | Chained split execution of fused compound arithmetic operations |
| US10078512B2 (en) | 2016-10-03 | 2018-09-18 | Via Alliance Semiconductor Co., Ltd. | Processing denormal numbers in FMA hardware |
| US11841792B1 (en) | 2019-12-09 | 2023-12-12 | Amazon Technologies, Inc. | Instructions with multiple memory access modes |
| US11334358B2 (en) * | 2019-12-09 | 2022-05-17 | Amazon Technologies, Inc. | Hardware accelerator having reconfigurable instruction set and reconfigurable decoder |
| US11500673B2 (en) | 2020-09-02 | 2022-11-15 | International Business Machines Corporation | Dynamically generating an optimized processing pipeline for tasks |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3875391A (en) * | 1973-11-02 | 1975-04-01 | Raytheon Co | Pipeline signal processor |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3626374A (en) * | 1970-02-10 | 1971-12-07 | Bell Telephone Labor Inc | High-speed data-directed information processing system characterized by a plural-module byte-organized memory unit |
| US3728692A (en) * | 1971-08-31 | 1973-04-17 | Ibm | Instruction selection in a two-program counter instruction unit |
| US3787673A (en) * | 1972-04-28 | 1974-01-22 | Texas Instruments Inc | Pipelined high speed arithmetic unit |
| GB1448866A (en) * | 1973-04-13 | 1976-09-08 | Int Computers Ltd | Microprogrammed data processing systems |
| GB1443777A (en) * | 1973-07-19 | 1976-07-28 | Int Computers Ltd | Data processing apparatus |
| IT993428B (it) * | 1973-09-26 | 1975-09-30 | Honeywell Inf Systems | Unita di controllo di calcolatore microprogrammato con microprogram mi residenti in memoria e sovrap posizioni delle fasi interpretati ve di una microistruzione con la fase esecutiva della precedente microistruzione |
| US3900836A (en) * | 1973-11-30 | 1975-08-19 | Ibm | Interleaved memory control signal handling apparatus using pipelining techniques |
| US3978452A (en) * | 1974-02-28 | 1976-08-31 | Burroughs Corporation | System and method for concurrent and pipeline processing employing a data driven network |
| US4025771A (en) * | 1974-03-25 | 1977-05-24 | Hughes Aircraft Company | Pipe line high speed signal processor |
| US4057846A (en) * | 1976-06-07 | 1977-11-08 | International Business Machines Corporation | Bus steering structure for low cost pipelined processor system |
-
1976
- 1976-08-17 GB GB34259/76A patent/GB1527289A/en not_active Expired
-
1977
- 1977-07-25 ZA ZA00774493A patent/ZA774493B/xx unknown
- 1977-08-09 DE DE2735814A patent/DE2735814C2/de not_active Expired
- 1977-08-15 AU AU27895/77A patent/AU509804B2/en not_active Expired
- 1977-08-17 JP JP9862577A patent/JPS5324243A/ja active Granted
- 1977-08-17 FR FR7725166A patent/FR2362444A1/fr active Granted
-
1978
- 1978-07-28 US US05/819,868 patent/US4187539A/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3875391A (en) * | 1973-11-02 | 1975-04-01 | Raytheon Co | Pipeline signal processor |
Non-Patent Citations (1)
| Title |
|---|
| EXBK/77 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2409550A1 (fr) * | 1977-11-21 | 1979-06-15 | Burroughs Corp | Appareil d'interface de la famille des gabarits |
| EP0376004A3 (fr) * | 1988-12-30 | 1991-10-23 | International Business Machines Corporation | Mise en séquence d'opérations avec un pipeline de longueur variable |
Also Published As
| Publication number | Publication date |
|---|---|
| GB1527289A (en) | 1978-10-04 |
| FR2362444B1 (fr) | 1984-05-25 |
| DE2735814A1 (de) | 1978-02-23 |
| AU2789577A (en) | 1979-02-22 |
| JPS5324243A (en) | 1978-03-06 |
| US4187539A (en) | 1980-02-05 |
| JPS6110858B2 (fr) | 1986-03-31 |
| AU509804B2 (en) | 1980-05-22 |
| ZA774493B (en) | 1978-06-28 |
| DE2735814C2 (de) | 1984-06-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |