FR2385103A1 - Systeme de localisation de defauts et de releve topographique de la surface d'un composant du genre pastille semi-conductrice - Google Patents

Systeme de localisation de defauts et de releve topographique de la surface d'un composant du genre pastille semi-conductrice

Info

Publication number
FR2385103A1
FR2385103A1 FR7804189A FR7804189A FR2385103A1 FR 2385103 A1 FR2385103 A1 FR 2385103A1 FR 7804189 A FR7804189 A FR 7804189A FR 7804189 A FR7804189 A FR 7804189A FR 2385103 A1 FR2385103 A1 FR 2385103A1
Authority
FR
France
Prior art keywords
pellet
semi
component
pellet type
topographic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7804189A
Other languages
English (en)
Other versions
FR2385103B1 (fr
Inventor
Marcel J Vogel
Siegfried F Vogel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2385103A1 publication Critical patent/FR2385103A1/fr
Application granted granted Critical
Publication of FR2385103B1 publication Critical patent/FR2385103B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques
    • G01B11/30—Measuring arrangements characterised by the use of optical techniques for measuring roughness or irregularity of surfaces
    • G01B11/303—Measuring arrangements characterised by the use of optical techniques for measuring roughness or irregularity of surfaces using photoelectric detection means
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B3/00—Measuring instruments characterised by the use of mechanical techniques
    • G01B3/02—Rulers with scales or marks for direct reading
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/501—Marks applied to devices, e.g. for alignment or identification for use before dicing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/975—Substrate or mask aligning feature

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
  • Thin Magnetic Films (AREA)

Abstract

Système pour localiser des défauts dans la surface d'une pastille et obtenir un relevé topographique de l'état de la surface. Il comprend une grille 20 disposée sur une surface de la pastille et formant un ensemble de cellules identiques 26 disposées en rangées et colonnes. Chaque cellule comprend des moyens de codage pour identifier dans quelle rangée et quelle colonne elle se trouve. L'examen simultané de la pastille et de la grille permet de localiser défauts et composants fabriqués sur la pastille. Application à la fabrication de dispositifs semi-conducteurs ou de dispositifs contenant des domaines magnétiques.
FR7804189A 1977-03-24 1978-02-08 Systeme de localisation de defauts et de releve topographique de la surface d'un composant du genre pastille semi-conductrice Granted FR2385103A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/780,877 US4134066A (en) 1977-03-24 1977-03-24 Wafer indexing system using a grid pattern and coding and orientation marks in each grid cell

Publications (2)

Publication Number Publication Date
FR2385103A1 true FR2385103A1 (fr) 1978-10-20
FR2385103B1 FR2385103B1 (fr) 1980-08-29

Family

ID=25120973

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7804189A Granted FR2385103A1 (fr) 1977-03-24 1978-02-08 Systeme de localisation de defauts et de releve topographique de la surface d'un composant du genre pastille semi-conductrice

Country Status (8)

Country Link
US (1) US4134066A (fr)
JP (1) JPS6030896B2 (fr)
CA (1) CA1117653A (fr)
DE (1) DE2809359C2 (fr)
FR (1) FR2385103A1 (fr)
GB (1) GB1591002A (fr)
IT (1) IT1113165B (fr)
NL (1) NL7802571A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0226893A1 (fr) * 1985-12-13 1987-07-01 Siemens Aktiengesellschaft Procédé de haute précision de mesure pour structures bidimensionnelles ainsi que masque de référence pour l'utilisation de ce procédé

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3122984A1 (de) * 1981-06-10 1983-01-27 Siemens AG, 1000 Berlin und 8000 München Verfahren zur kennzeichnung von halbleiterchips und kennzeichenbarer helbleiterchip
US4388386A (en) * 1982-06-07 1983-06-14 International Business Machines Corporation Mask set mismatch
KR900008384B1 (ko) * 1986-05-20 1990-11-17 후지쓰 가부시끼가이샤 바아 코우드 패턴을 형성시킨 반도체 웨이퍼의 식별방법 및 반도체 장치의 제조방법
CH670592A5 (fr) * 1986-09-22 1989-06-30 Lasarray Holding Ag
JP2754609B2 (ja) * 1988-06-08 1998-05-20 日本電気株式会社 半導体装置の製造方法
DE4038723A1 (de) * 1990-12-05 1992-06-11 Bosch Gmbh Robert Auf einer platte gemeinsam hergestellte und danach vereinzelte, gleichartige halbleiter-chips mit indizierung
US5256578A (en) * 1991-12-23 1993-10-26 Motorola, Inc. Integral semiconductor wafer map recording
KR0154158B1 (ko) * 1994-07-14 1998-12-01 김주용 반도체소자의 공정결함 검사방법
JPH10177245A (ja) * 1996-12-18 1998-06-30 Fujitsu Ltd レチクル、半導体基板及び半導体チップ
US6889162B1 (en) * 2000-03-07 2005-05-03 Koninklijke Philips Electronics N.V. Wafer target design and method for determining centroid of wafer target
US7531907B2 (en) * 2005-04-29 2009-05-12 Hitachi Global Storage Technologies Netherlands B.V. System and method for forming serial numbers on HDD wafers
JP4665005B2 (ja) * 2008-02-27 2011-04-06 シャープ株式会社 半導体装置およびその製造方法、電子情報機器
AU2009315665A1 (en) * 2008-11-17 2010-05-20 Arrowhead Research Corporation Compositions and methods for inhibiting expression of factor VII genes
FI128447B (en) * 2016-04-26 2020-05-15 Teknologian Tutkimuskeskus Vtt Oy Apparatus associated with analysis of thin film layer and manufacturing method thereof
CN114046749B (zh) * 2021-10-26 2022-07-08 刘红霞 预制混凝土构件点状凹坑结合面粗糙度检测方法及系统

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2012360A1 (de) * 1969-03-19 1970-10-01 Arbeitsstelle für Molekularelektronik, χ 8O8O Dresden Patentwesen, Ost-Berlin WPI38673 Verfahren und Schaltungsanordnung zum Herstellen von Fotoschablonen mit Wiederholsystemen beliebiger Größe, die in einem bezüglich eines Fixpunktes definiert verschobenen Schablonenfeld angeordnet sind
LU65252A1 (fr) * 1971-04-28 1972-07-14

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1024961A (en) * 1963-02-21 1966-04-06 Eastman Kodak Co Improvements relating to a method of preparing an index file from recorded information and index patterns
DE1948661A1 (de) * 1968-11-04 1970-05-06 Molekularelektronik Schaltungsanordnung zur Realisierung bestimmter typischer Prozessschritte beim Herstellen und/oder Pruefen von Halbleiterbauelementen,insbesondere zum automatischen Einordnen beliebiger Fremdstrukturen in ein Rasterschema
US3607347A (en) * 1969-08-04 1971-09-21 Sprague Electric Co Data reduction and storage
US3645626A (en) * 1970-06-15 1972-02-29 Ibm Apparatus for detecting defects by optical scanning
DE2226149A1 (de) * 1971-11-02 1973-05-10 Halbleiterwerk Frankfurt Oder Verfahren zum erkennen der groesse von lage-, winkel- und ueberdeckungsfehlern bei der herstellung und anwendung von schablonen in der halbleitertechnik
US3742229A (en) * 1972-06-29 1973-06-26 Massachusetts Inst Technology Soft x-ray mask alignment system
US3863764A (en) * 1974-02-28 1975-02-04 Western Electric Co Methods and apparatus for identifying nonmagnetic articles
US3998639A (en) * 1974-11-19 1976-12-21 Bell Telephone Laboratories, Incorporated Methods for determining feature-size accuracy of circuit patterns
US3963354A (en) * 1975-05-05 1976-06-15 Bell Telephone Laboratories, Incorporated Inspection of masks and wafers by image dissection
JPS51140199A (en) * 1975-05-30 1976-12-02 Hitachi Metals Ltd Crystal working process

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2012360A1 (de) * 1969-03-19 1970-10-01 Arbeitsstelle für Molekularelektronik, χ 8O8O Dresden Patentwesen, Ost-Berlin WPI38673 Verfahren und Schaltungsanordnung zum Herstellen von Fotoschablonen mit Wiederholsystemen beliebiger Größe, die in einem bezüglich eines Fixpunktes definiert verschobenen Schablonenfeld angeordnet sind
LU65252A1 (fr) * 1971-04-28 1972-07-14

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0226893A1 (fr) * 1985-12-13 1987-07-01 Siemens Aktiengesellschaft Procédé de haute précision de mesure pour structures bidimensionnelles ainsi que masque de référence pour l'utilisation de ce procédé

Also Published As

Publication number Publication date
IT7821408A0 (it) 1978-03-21
GB1591002A (en) 1981-06-10
NL7802571A (nl) 1978-09-26
DE2809359A1 (de) 1978-09-28
JPS6030896B2 (ja) 1985-07-19
FR2385103B1 (fr) 1980-08-29
IT1113165B (it) 1986-01-20
CA1117653A (fr) 1982-02-02
JPS53118797A (en) 1978-10-17
US4134066A (en) 1979-01-09
DE2809359C2 (de) 1984-01-26

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