FR2427689A1 - Procede de fabrication de transistors a effet de champ - Google Patents

Procede de fabrication de transistors a effet de champ

Info

Publication number
FR2427689A1
FR2427689A1 FR7914018A FR7914018A FR2427689A1 FR 2427689 A1 FR2427689 A1 FR 2427689A1 FR 7914018 A FR7914018 A FR 7914018A FR 7914018 A FR7914018 A FR 7914018A FR 2427689 A1 FR2427689 A1 FR 2427689A1
Authority
FR
France
Prior art keywords
substrate
active layer
effect transistors
manufacturing field
semiconductor material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7914018A
Other languages
English (en)
Inventor
Brian Thomas Hughes
Reuben Redstone
John Charles Vokes
David Robert Wight
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
UK Government
Original Assignee
UK Government
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by UK Government filed Critical UK Government
Publication of FR2427689A1 publication Critical patent/FR2427689A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/80FETs having rectifying junction gate electrodes
    • H10D30/87FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET]
    • H10D30/875FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET] having thin-film semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/80FETs having rectifying junction gate electrodes
    • H10D30/87FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/64Wet etching of semiconductor materials
    • H10P50/642Chemical etching
    • H10P50/646Chemical etching of Group III-V materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07337Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/977Thinning or removal of substrate

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Bipolar Transistors (AREA)
  • Thin Film Transistor (AREA)

Abstract

L'invention concerne un procédé de fabrication de transistors à effet de champ. Le procédé est caractérisé en ce qu'on forme une couche active de matière semi-conductrice sur une surface d'un premier substrat en matière semi-conductrice, en ce qu'on dépose un second substrat de matière isolante sur la surface de la structure comprenant le premier substrat et la couche active de manière que cette couche active soit située entre les deux substrats, en ce qu'on enlève le premier substrat et en ce qu'on forme des électrodes de source, de drain et de grille sur la surface de la couche active placée en regard du second substrat. Application au domaine des composants électroniques.
FR7914018A 1978-05-31 1979-05-31 Procede de fabrication de transistors a effet de champ Withdrawn FR2427689A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB25553/78A GB1602498A (en) 1978-05-31 1978-05-31 Fet devices and their fabrication

Publications (1)

Publication Number Publication Date
FR2427689A1 true FR2427689A1 (fr) 1979-12-28

Family

ID=10229555

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7914018A Withdrawn FR2427689A1 (fr) 1978-05-31 1979-05-31 Procede de fabrication de transistors a effet de champ

Country Status (7)

Country Link
US (1) US4325073A (fr)
EP (1) EP0006002B1 (fr)
JP (1) JPS54158882A (fr)
AU (1) AU4758479A (fr)
DE (1) DE2962684D1 (fr)
FR (1) FR2427689A1 (fr)
GB (1) GB1602498A (fr)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4387386A (en) * 1980-06-09 1983-06-07 The United States Of America As Represented By The Secretary Of The Army Microwave controlled field effect switching device
US4532695A (en) * 1982-07-02 1985-08-06 The United States Of America As Represented By The Secretary Of The Air Force Method of making self-aligned IGFET
JPS5910988A (ja) * 1982-07-12 1984-01-20 ホシデン株式会社 カラ−液晶表示器
US4507845A (en) * 1983-09-12 1985-04-02 Trw Inc. Method of making field effect transistors with opposed source _and gate regions
JPS6085567A (ja) * 1983-10-17 1985-05-15 Mitsubishi Electric Corp 電界効果トランジスタ
EP0143656B1 (fr) * 1983-11-29 1989-02-22 Fujitsu Limited Dispositif semi-conducteur à semi-conducteurs composés et procédé de fabrication
IT1175541B (it) * 1984-06-22 1987-07-01 Telettra Lab Telefon Procedimento per la connessione a terra di dispositivi planari e circuiti integrati e prodotti cosi' ottenuti
US4784967A (en) * 1986-12-19 1988-11-15 American Telephone And Telegraph Company, At&T Bell Laboratories Method for fabricating a field-effect transistor with a self-aligned gate
US4789645A (en) * 1987-04-20 1988-12-06 Eaton Corporation Method for fabrication of monolithic integrated circuits
JPS6415913A (en) * 1987-07-09 1989-01-19 Mitsubishi Monsanto Chem Epitaxial growth method of substrate for high-brightness led
US5283201A (en) * 1988-05-17 1994-02-01 Advanced Power Technology, Inc. High density power device fabrication process
DE59010851D1 (de) * 1989-04-27 1998-11-12 Max Planck Gesellschaft Halbleiterstruktur mit einer 2D-Ladungsträgerschicht und Herstellungsverfahren
US4927782A (en) * 1989-06-27 1990-05-22 The United States Of America As Represented By The Secretary Of The Navy Method of making self-aligned GaAs/AlGaAs FET's
US5013681A (en) * 1989-09-29 1991-05-07 The United States Of America As Represented By The Secretary Of The Navy Method of producing a thin silicon-on-insulator layer
US5196358A (en) * 1989-12-29 1993-03-23 The United States Of America As Represented By The Secretary Of The Navy Method of manufacturing InP junction FETS and junction HEMTS using dual implantation and double nitride layers
US5385865A (en) * 1990-04-26 1995-01-31 Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften Method of generating active semiconductor structures by means of starting structures which have a 2D charge carrier layer parallel to the surface
JPH08321512A (ja) * 1995-05-25 1996-12-03 Murata Mfg Co Ltd 電界効果トランジスタとその製造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4193836A (en) * 1963-12-16 1980-03-18 Signetics Corporation Method for making semiconductor structure
US3332137A (en) * 1964-09-28 1967-07-25 Rca Corp Method of isolating chips of a wafer of semiconductor material
DE1514943C3 (de) * 1966-03-18 1974-09-12 Telefunken Patentverwertungsgesellschaft Mbh, 7900 Ulm Verfahren zur Herstellung von Halbleiteranordnungen
US3621565A (en) * 1969-06-12 1971-11-23 Nasa Fabrication of single-crystal film semiconductor devices
JPS4914381B1 (fr) 1969-09-01 1974-04-06
JPS4839868B1 (fr) * 1969-09-19 1973-11-27
US3914137A (en) * 1971-10-06 1975-10-21 Motorola Inc Method of manufacturing a light coupled monolithic circuit by selective epitaxial deposition
US3823467A (en) * 1972-07-07 1974-07-16 Westinghouse Electric Corp Solid-state circuit module
US3972770A (en) * 1973-07-23 1976-08-03 International Telephone And Telegraph Corporation Method of preparation of electron emissive materials
GB1480592A (en) * 1973-11-02 1977-07-20 Marconi Co Ltd Light emitting diodes
NL7505134A (nl) * 1975-05-01 1976-11-03 Philips Nv Werkwijze voor het vervaardigen van een half- geleiderinrichting.
IT1041193B (it) * 1975-08-08 1980-01-10 Selenia Ind Elettroniche Perfezionamenti nei procedimenti per la fabbricazione di dispositivi a semiconduttor
FR2328292A1 (fr) * 1975-10-14 1977-05-13 Thomson Csf Nouvelles structures a effet de champ
FR2328290A1 (fr) * 1975-10-14 1977-05-13 Thomson Csf Nouvelles structures a effet de champ
FR2386903A1 (fr) * 1977-04-08 1978-11-03 Thomson Csf Transistor a effet de champ sur support a grande bande interdite

Also Published As

Publication number Publication date
EP0006002A1 (fr) 1979-12-12
EP0006002B1 (fr) 1982-05-05
US4325073A (en) 1982-04-13
AU4758479A (en) 1979-12-06
GB1602498A (en) 1981-11-11
DE2962684D1 (en) 1982-06-24
JPS54158882A (en) 1979-12-15

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