FR2575332B1 - Dispositif semi-conducteur ayant une couche metallisee de plusieurs epaisseurs et procede pour sa fabrication - Google Patents

Dispositif semi-conducteur ayant une couche metallisee de plusieurs epaisseurs et procede pour sa fabrication

Info

Publication number
FR2575332B1
FR2575332B1 FR8518793A FR8518793A FR2575332B1 FR 2575332 B1 FR2575332 B1 FR 2575332B1 FR 8518793 A FR8518793 A FR 8518793A FR 8518793 A FR8518793 A FR 8518793A FR 2575332 B1 FR2575332 B1 FR 2575332B1
Authority
FR
France
Prior art keywords
production
semiconductor device
metallic layer
multiple thicknesses
thicknesses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR8518793A
Other languages
English (en)
Other versions
FR2575332A1 (fr
Inventor
Contiero Giulio Iannuz Claudio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS Microelettronica SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Microelettronica SpA filed Critical SGS Microelettronica SpA
Publication of FR2575332A1 publication Critical patent/FR2575332A1/fr
Application granted granted Critical
Publication of FR2575332B1 publication Critical patent/FR2575332B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425Barrier, adhesion or liner layers
FR8518793A 1984-12-20 1985-12-18 Dispositif semi-conducteur ayant une couche metallisee de plusieurs epaisseurs et procede pour sa fabrication Expired - Lifetime FR2575332B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8424139A IT1213261B (it) 1984-12-20 1984-12-20 Dispositivo a semiconduttore con metallizzazione a piu' spessori eprocedimento per la sua fabbricazione.

Publications (2)

Publication Number Publication Date
FR2575332A1 FR2575332A1 (fr) 1986-06-27
FR2575332B1 true FR2575332B1 (fr) 1996-05-24

Family

ID=11212175

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8518793A Expired - Lifetime FR2575332B1 (fr) 1984-12-20 1985-12-18 Dispositif semi-conducteur ayant une couche metallisee de plusieurs epaisseurs et procede pour sa fabrication

Country Status (7)

Country Link
US (1) US4718977A (fr)
JP (1) JPS61152042A (fr)
DE (1) DE3544539C2 (fr)
FR (1) FR2575332B1 (fr)
GB (1) GB2168846B (fr)
IT (1) IT1213261B (fr)
NL (1) NL193808C (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4924287A (en) * 1985-01-20 1990-05-08 Avner Pdahtzur Personalizable CMOS gate array device and technique
IL82113A (en) * 1987-04-05 1992-08-18 Zvi Orbach Fabrication of customized integrated circuits
GB2206540B (en) * 1987-06-30 1991-03-27 British Aerospace Aperture forming method
JPH0290651A (ja) * 1988-09-28 1990-03-30 Nec Corp 半導体集積回路
FR2713397B1 (fr) * 1993-12-03 1996-02-16 Sgs Thomson Microelectronics Procédé de formation de couches métalliques minces et épaisses.
DE19521006C2 (de) * 1994-06-08 2000-02-17 Hyundai Electronics Ind Halbleiterbauelement und Verfahren zu seiner Herstellung
TW318261B (fr) * 1995-09-21 1997-10-21 Handotai Energy Kenkyusho Kk
JP4179483B2 (ja) * 1996-02-13 2008-11-12 株式会社半導体エネルギー研究所 表示装置の作製方法
FR2780202A1 (fr) * 1998-06-23 1999-12-24 St Microelectronics Sa Circuit integre a niveau de metallisation d'epaisseur variable
TW453139B (en) * 1998-07-13 2001-09-01 Siemens Ag Method to produce circuit-plates with coarse conductive patterns and at least one region with fine conductive patterns
DE19912441A1 (de) * 1999-03-19 2000-09-21 Elfo Ag Sachseln Sachseln Multi-Chip-Modul
US6077766A (en) * 1999-06-25 2000-06-20 International Business Machines Corporation Variable thickness pads on a substrate surface
DE102004003538B3 (de) * 2004-01-23 2005-09-08 Infineon Technologies Ag Integrierte Halbleiterschaltung mit einer Logik- und Leistungs-Metallisierung ohne Intermetall-Dielektrikum und Verfahren zu ihrer Herstellung
DE102004009296B4 (de) * 2004-02-26 2011-01-27 Siemens Ag Verfahren zum Herstellen einer Anordnung eines elektrischen Bauelements

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL6706868A (fr) * 1967-05-18 1968-11-19
US3700510A (en) * 1970-03-09 1972-10-24 Hughes Aircraft Co Masking techniques for use in fabricating microelectronic components
US4000842A (en) * 1975-06-02 1977-01-04 National Semiconductor Corporation Copper-to-gold thermal compression gang bonding of interconnect leads to semiconductive devices
US4017890A (en) * 1975-10-24 1977-04-12 International Business Machines Corporation Intermetallic compound layer in thin films for improved electromigration resistance
JPS52149990A (en) * 1976-06-09 1977-12-13 Hitachi Ltd Production of multilayer wirings
JPS5365088A (en) * 1976-11-22 1978-06-10 Nec Corp Semiconductor device
JPS53121490A (en) * 1977-03-31 1978-10-23 Toshiba Corp Semiconductor device
US4233337A (en) * 1978-05-01 1980-11-11 International Business Machines Corporation Method for forming semiconductor contacts
JPS5640260A (en) * 1979-09-11 1981-04-16 Mitsubishi Electric Corp Manufacture of semiconductor device
EP0060253A1 (fr) * 1980-09-15 1982-09-22 Mostek Corporation Reseau de distribution de puissance a circuit integre
JPS58137231A (ja) * 1982-02-09 1983-08-15 Nec Corp 集積回路装置
EP0105324A4 (fr) * 1982-04-12 1986-07-24 Motorola Inc CONTACT OHMIQUE POUR GaAs DE TYPE N.
JPS58204558A (ja) * 1982-05-25 1983-11-29 Nec Corp 配線方法
DE3232837A1 (de) * 1982-09-03 1984-03-08 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen einer 2-ebenen-metallisierung fuer halbleiterbauelemente, insbesondere fuer leistungshalbleiterbauelemente wie thyristoren
JPS59198734A (ja) * 1983-04-25 1984-11-10 Mitsubishi Electric Corp 多層配線構造
GB8316476D0 (en) * 1983-06-16 1983-07-20 Plessey Co Plc Producing layered structure

Also Published As

Publication number Publication date
NL193808C (nl) 2000-11-06
JPS61152042A (ja) 1986-07-10
IT8424139A0 (it) 1984-12-20
GB8531175D0 (en) 1986-01-29
FR2575332A1 (fr) 1986-06-27
US4718977A (en) 1988-01-12
DE3544539A1 (de) 1986-07-03
GB2168846B (en) 1988-11-30
DE3544539C2 (de) 1996-02-08
NL193808B (nl) 2000-07-03
GB2168846A (en) 1986-06-25
IT1213261B (it) 1989-12-14
NL8503486A (nl) 1986-07-16

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