FR2928029B1 - Procede de fabrication d'un dispositif semi-conducteur a grille enterree et circuit integre correspondant. - Google Patents

Procede de fabrication d'un dispositif semi-conducteur a grille enterree et circuit integre correspondant.

Info

Publication number
FR2928029B1
FR2928029B1 FR0851266A FR0851266A FR2928029B1 FR 2928029 B1 FR2928029 B1 FR 2928029B1 FR 0851266 A FR0851266 A FR 0851266A FR 0851266 A FR0851266 A FR 0851266A FR 2928029 B1 FR2928029 B1 FR 2928029B1
Authority
FR
France
Prior art keywords
manufacturing
semiconductor device
integrated circuit
corresponding integrated
grid semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0851266A
Other languages
English (en)
Other versions
FR2928029A1 (fr
Inventor
Emilie Bernard
Bernard Guillaumot
Philippe Coronel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
STMicroelectronics Crolles 2 SAS
Original Assignee
STMicroelectronics SA
STMicroelectronics Crolles 2 SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA, STMicroelectronics Crolles 2 SAS filed Critical STMicroelectronics SA
Priority to FR0851266A priority Critical patent/FR2928029B1/fr
Priority to US12/372,415 priority patent/US7977187B2/en
Publication of FR2928029A1 publication Critical patent/FR2928029A1/fr
Application granted granted Critical
Publication of FR2928029B1 publication Critical patent/FR2928029B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739—Conductor-insulator-semiconductor electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/026—Manufacture or treatment of FETs having insulated gates [IGFET] having laterally-coplanar source and drain regions, a gate at the sides of the bulk channel, and both horizontal and vertical current flow
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
FR0851266A 2008-02-27 2008-02-27 Procede de fabrication d'un dispositif semi-conducteur a grille enterree et circuit integre correspondant. Expired - Fee Related FR2928029B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0851266A FR2928029B1 (fr) 2008-02-27 2008-02-27 Procede de fabrication d'un dispositif semi-conducteur a grille enterree et circuit integre correspondant.
US12/372,415 US7977187B2 (en) 2008-02-27 2009-02-17 Method of fabricating a buried-gate semiconductor device and corresponding integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0851266A FR2928029B1 (fr) 2008-02-27 2008-02-27 Procede de fabrication d'un dispositif semi-conducteur a grille enterree et circuit integre correspondant.

Publications (2)

Publication Number Publication Date
FR2928029A1 FR2928029A1 (fr) 2009-08-28
FR2928029B1 true FR2928029B1 (fr) 2011-04-08

Family

ID=39864943

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0851266A Expired - Fee Related FR2928029B1 (fr) 2008-02-27 2008-02-27 Procede de fabrication d'un dispositif semi-conducteur a grille enterree et circuit integre correspondant.

Country Status (2)

Country Link
US (1) US7977187B2 (fr)
FR (1) FR2928029B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101903992B (zh) * 2007-12-21 2012-06-27 Nxp股份有限公司 用于平面独立栅或环栅晶体管的改进的制造方法
US9224810B2 (en) 2011-12-23 2015-12-29 Intel Corporation CMOS nanowire structure
US8785310B2 (en) 2012-01-27 2014-07-22 Tokyo Electron Limited Method of forming conformal metal silicide films
GB2526460B (en) * 2013-03-15 2018-08-01 Intel Corp Nanowire transistor fabrication with hardmask layers
US9391163B2 (en) 2014-10-03 2016-07-12 International Business Machines Corporation Stacked planar double-gate lamellar field-effect transistor
FR3087046B1 (fr) * 2018-10-05 2020-12-25 Commissariat Energie Atomique Structure a barreaux semi-conducteurs superposes ayant une enveloppe semi-conductrice uniforme
US20240421233A1 (en) * 2023-06-13 2024-12-19 Globalfoundries Singapore Pte. Ltd. Gated body transistors

Family Cites Families (23)

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US4803539A (en) * 1985-03-29 1989-02-07 International Business Machines Corporation Dopant control of metal silicide formation
US5004705A (en) * 1989-01-06 1991-04-02 Unitrode Corporation Inverted epitaxial process
DE19924571C2 (de) * 1999-05-28 2001-03-15 Siemens Ag Verfahren zur Herstellung eines Doppel-Gate-MOSFET-Transistors
DE19928564A1 (de) * 1999-06-22 2001-01-04 Infineon Technologies Ag Mehrkanal-MOSFET und Verfahren zu seiner Herstellung
US20030054637A1 (en) * 2001-09-20 2003-03-20 Macronix International Co., Ltd. Method for forming silicide
US6661044B2 (en) * 2001-10-22 2003-12-09 Winbond Electronics Corp. Method of manufacturing MOSEFT and structure thereof
FR2845201B1 (fr) * 2002-09-27 2005-08-05 St Microelectronics Sa Procede de formation de portions d'un materiau compose a l'interieur d'une cavite et circuit electrique incorporant des portions de materiau compose ainsi obtenues
FR2853454B1 (fr) 2003-04-03 2005-07-15 St Microelectronics Sa Transistor mos haute densite
KR100471173B1 (ko) * 2003-05-15 2005-03-10 삼성전자주식회사 다층채널을 갖는 트랜지스터 및 그 제조방법
US6787425B1 (en) * 2003-06-16 2004-09-07 Texas Instruments Incorporated Methods for fabricating transistor gate structures
US7095065B2 (en) * 2003-08-05 2006-08-22 Advanced Micro Devices, Inc. Varying carrier mobility in semiconductor devices to achieve overall design goals
JP3962009B2 (ja) * 2003-12-05 2007-08-22 株式会社東芝 半導体装置の製造方法
KR100526887B1 (ko) * 2004-02-10 2005-11-09 삼성전자주식회사 전계효과 트랜지스터 및 그의 제조방법
KR100612415B1 (ko) * 2004-04-09 2006-08-16 삼성전자주식회사 올 어라운드된 채널 영역을 갖는 트랜지스터 및 그 제조방법
KR100625177B1 (ko) * 2004-05-25 2006-09-20 삼성전자주식회사 멀티-브리지 채널형 모오스 트랜지스터의 제조 방법
KR100555567B1 (ko) * 2004-07-30 2006-03-03 삼성전자주식회사 다중가교채널 트랜지스터 제조 방법
KR100640616B1 (ko) * 2004-12-21 2006-11-01 삼성전자주식회사 매몰 게이트 패턴을 포함하는 전계 효과 트랜지스터구조물 및 그것을 포함하는 반도체 소자의 제조방법
JP2006278369A (ja) * 2005-03-28 2006-10-12 Fujitsu Ltd 半導体装置の製造方法
US7470943B2 (en) * 2005-08-22 2008-12-30 International Business Machines Corporation High performance MOSFET comprising a stressed gate metal silicide layer and method of fabricating the same
KR100630763B1 (ko) * 2005-08-30 2006-10-04 삼성전자주식회사 다중 채널을 갖는 ｍｏｓ 트랜지스터의 제조방법
KR100718149B1 (ko) * 2006-02-07 2007-05-14 삼성전자주식회사 게이트-올-어라운드 구조의 반도체 소자
JP2007288096A (ja) * 2006-04-20 2007-11-01 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US7749898B2 (en) * 2008-06-24 2010-07-06 Globalfoundries Inc. Silicide interconnect structure

Also Published As

Publication number Publication date
US7977187B2 (en) 2011-07-12
US20090212330A1 (en) 2009-08-27
FR2928029A1 (fr) 2009-08-28

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Effective date: 20151030