FR2995444B1 - Procede de detachement d'une couche - Google Patents

Procede de detachement d'une couche

Info

Publication number
FR2995444B1
FR2995444B1 FR1202437A FR1202437A FR2995444B1 FR 2995444 B1 FR2995444 B1 FR 2995444B1 FR 1202437 A FR1202437 A FR 1202437A FR 1202437 A FR1202437 A FR 1202437A FR 2995444 B1 FR2995444 B1 FR 2995444B1
Authority
FR
France
Prior art keywords
detaching
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1202437A
Other languages
English (en)
Other versions
FR2995444A1 (fr
Inventor
Alexandre Barthelemy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR1202437A priority Critical patent/FR2995444B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to SG11201501060YA priority patent/SG11201501060YA/en
Priority to US14/426,509 priority patent/US9275893B2/en
Priority to KR1020157006046A priority patent/KR102053793B1/ko
Priority to DE112013004407.2T priority patent/DE112013004407T5/de
Priority to CN201380046829.9A priority patent/CN104603930B/zh
Priority to PCT/IB2013/000653 priority patent/WO2014037769A1/fr
Publication of FR2995444A1 publication Critical patent/FR2995444A1/fr
Application granted granted Critical
Publication of FR2995444B1 publication Critical patent/FR2995444B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1924Preparing SOI wafers with separation/delamination along a porous layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • H10P90/1916Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
FR1202437A 2012-09-10 2012-09-10 Procede de detachement d'une couche Active FR2995444B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR1202437A FR2995444B1 (fr) 2012-09-10 2012-09-10 Procede de detachement d'une couche
US14/426,509 US9275893B2 (en) 2012-09-10 2013-04-10 Method of detaching a layer
KR1020157006046A KR102053793B1 (ko) 2012-09-10 2013-04-10 층의 분리 방법
DE112013004407.2T DE112013004407T5 (de) 2012-09-10 2013-04-10 Verfahren zum Ablösen einer Schicht
SG11201501060YA SG11201501060YA (en) 2012-09-10 2013-04-10 Method of detaching a layer
CN201380046829.9A CN104603930B (zh) 2012-09-10 2013-04-10 分离层的方法
PCT/IB2013/000653 WO2014037769A1 (fr) 2012-09-10 2013-04-10 Procédé de décollement d'une couche

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1202437A FR2995444B1 (fr) 2012-09-10 2012-09-10 Procede de detachement d'une couche

Publications (2)

Publication Number Publication Date
FR2995444A1 FR2995444A1 (fr) 2014-03-14
FR2995444B1 true FR2995444B1 (fr) 2016-11-25

Family

ID=47427314

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1202437A Active FR2995444B1 (fr) 2012-09-10 2012-09-10 Procede de detachement d'une couche

Country Status (7)

Country Link
US (1) US9275893B2 (fr)
KR (1) KR102053793B1 (fr)
CN (1) CN104603930B (fr)
DE (1) DE112013004407T5 (fr)
FR (1) FR2995444B1 (fr)
SG (1) SG11201501060YA (fr)
WO (1) WO2014037769A1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106548972B (zh) * 2015-09-18 2019-02-26 胡兵 一种将半导体衬底主体与其上功能层进行分离的方法
US12191192B2 (en) * 2015-09-18 2025-01-07 Bing Hu Method of forming engineered wafers
FR3077923B1 (fr) * 2018-02-12 2021-07-16 Soitec Silicon On Insulator Procede de fabrication d'une structure de type semi-conducteur sur isolant par transfert de couche
FR3078822B1 (fr) * 2018-03-12 2020-02-28 Soitec Procede de preparation d’une couche mince de materiau ferroelectrique a base d’alcalin
TWI862232B (zh) 2023-10-20 2024-11-11 國立中央大學 半導體基板處理方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3293736B2 (ja) * 1996-02-28 2002-06-17 キヤノン株式会社 半導体基板の作製方法および貼り合わせ基体
US20030087503A1 (en) * 1994-03-10 2003-05-08 Canon Kabushiki Kaisha Process for production of semiconductor substrate
CN1132223C (zh) 1995-10-06 2003-12-24 佳能株式会社 半导体衬底及其制造方法
ATE275761T1 (de) * 1997-03-26 2004-09-15 Canon Kk Halbleitersubstrat und verfahren zu dessen herstellung
FR2773261B1 (fr) * 1997-12-30 2000-01-28 Commissariat Energie Atomique Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions
JP3697106B2 (ja) * 1998-05-15 2005-09-21 キヤノン株式会社 半導体基板の作製方法及び半導体薄膜の作製方法
JP2004311955A (ja) * 2003-03-25 2004-11-04 Sony Corp 超薄型電気光学表示装置の製造方法
FR2880184B1 (fr) * 2004-12-28 2007-03-30 Commissariat Energie Atomique Procede de detourage d'une structure obtenue par assemblage de deux plaques
EP1863100A1 (fr) 2006-05-30 2007-12-05 INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM vzw (IMEC) Méthode de production de substrats fin
FR2928775B1 (fr) * 2008-03-11 2011-12-09 Soitec Silicon On Insulator Procede de fabrication d'un substrat de type semiconducteur sur isolant
FR2936356B1 (fr) * 2008-09-23 2010-10-22 Soitec Silicon On Insulator Procede de dissolution locale de la couche d'oxyde dans une structure de type semi-conducteur sur isolant
US8048754B2 (en) * 2008-09-29 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and method for manufacturing single crystal semiconductor layer
FR2938119B1 (fr) * 2008-10-30 2011-04-22 Soitec Silicon On Insulator Procede de detachement de couches semi-conductrices a basse temperature
FR2942073B1 (fr) * 2009-02-10 2011-04-29 Soitec Silicon On Insulator Procede de realisation d'une couche de cavites
US8546238B2 (en) * 2009-04-22 2013-10-01 Commissariat A L'energie Atomique Et Aux Energies Method for transferring at least one micro-technological layer
FR2965396B1 (fr) * 2010-09-29 2013-02-22 S O I Tec Silicon On Insulator Tech Substrat démontable, procédés de fabrication et de démontage d'un tel substrat
FR2967812B1 (fr) * 2010-11-19 2016-06-10 S O I Tec Silicon On Insulator Tech Dispositif electronique pour applications radiofrequence ou de puissance et procede de fabrication d'un tel dispositif
FR2972564B1 (fr) * 2011-03-08 2016-11-04 S O I Tec Silicon On Insulator Tech Procédé de traitement d'une structure de type semi-conducteur sur isolant
FR2980280B1 (fr) * 2011-09-20 2013-10-11 Soitec Silicon On Insulator Procede de separation d'une couche dans une structure composite
FR2980279B1 (fr) * 2011-09-20 2013-10-11 Soitec Silicon On Insulator Procede de fabrication d'une structure composite a separer par exfoliation
FR2983342B1 (fr) * 2011-11-30 2016-05-20 Soitec Silicon On Insulator Procede de fabrication d'une heterostructure limitant la formation de defauts et heterostructure ainsi obtenue
US20130193445A1 (en) * 2012-01-26 2013-08-01 International Business Machines Corporation Soi structures including a buried boron nitride dielectric
US9214353B2 (en) * 2012-02-26 2015-12-15 Solexel, Inc. Systems and methods for laser splitting and device layer transfer
FR2991099B1 (fr) * 2012-05-25 2014-05-23 Soitec Silicon On Insulator Procede de traitement d'une structure semi-conducteur sur isolant en vue d'uniformiser l'epaisseur de la couche semi-conductrice

Also Published As

Publication number Publication date
WO2014037769A1 (fr) 2014-03-13
SG11201501060YA (en) 2015-03-30
CN104603930A (zh) 2015-05-06
US9275893B2 (en) 2016-03-01
FR2995444A1 (fr) 2014-03-14
DE112013004407T5 (de) 2015-06-11
CN104603930B (zh) 2018-06-05
KR102053793B1 (ko) 2019-12-06
US20150243551A1 (en) 2015-08-27
KR20150053914A (ko) 2015-05-19

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