FR3043837B1 - Procede de realisation de transistor a nanofil semi-conducteur et comprenant une grille et des espaceurs auto-alignes - Google Patents
Procede de realisation de transistor a nanofil semi-conducteur et comprenant une grille et des espaceurs auto-alignesInfo
- Publication number
- FR3043837B1 FR3043837B1 FR1561044A FR1561044A FR3043837B1 FR 3043837 B1 FR3043837 B1 FR 3043837B1 FR 1561044 A FR1561044 A FR 1561044A FR 1561044 A FR1561044 A FR 1561044A FR 3043837 B1 FR3043837 B1 FR 3043837B1
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- dielectric layer
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- transistor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/018—Spacers formed inside holes at the prospective gate locations, e.g. holes left by removing dummy gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/014—Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
- H10D30/6743—Silicon
- H10D30/6744—Monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
- H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
- H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
- H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/90—Thermal treatments, e.g. annealing or sintering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
- H10D62/118—Nanostructure semiconductor bodies
- H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
- H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates
Landscapes
- Thin Film Transistor (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
Abstract
Procédé de réalisation d'un transistor (100) à nanofil semi-conducteur, comportant les étapes : - réaliser, sur un support (102), un nanofil semi-conducteur dont une portion (123) est recouverte d'une grille sacrificielle entourée, avec le nanofil, d'une couche diélectrique, - retirer la grille sacrificielle, formant un premier espace entouré de premières parties de la couche diélectrique, - implanter ioniquement une deuxième partie de la couche diélectrique sous ladite première portion, lesdites premières parties protégeant des troisièmes parties (136) de la couche diélectrique, - graver ladite deuxième partie, formant un deuxième espace, - réaliser une grille (140, 142) dans les espaces, et une portion diélectrique (148) sur la grille et lesdites premières parties, - implanter ioniquement des quatrièmes parties de la couche diélectrique entourant des deuxièmes portions du nanofil, la portion diélectrique protégeant lesdites premières et troisièmes parties, - graver lesdites quatrièmes parties.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1561044A FR3043837B1 (fr) | 2015-11-17 | 2015-11-17 | Procede de realisation de transistor a nanofil semi-conducteur et comprenant une grille et des espaceurs auto-alignes |
| US15/352,198 US9853124B2 (en) | 2015-11-17 | 2016-11-15 | Method for fabricating a nanowire semiconductor transistor having an auto-aligned gate and spacers |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1561044A FR3043837B1 (fr) | 2015-11-17 | 2015-11-17 | Procede de realisation de transistor a nanofil semi-conducteur et comprenant une grille et des espaceurs auto-alignes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR3043837A1 FR3043837A1 (fr) | 2017-05-19 |
| FR3043837B1 true FR3043837B1 (fr) | 2017-12-15 |
Family
ID=54979856
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR1561044A Active FR3043837B1 (fr) | 2015-11-17 | 2015-11-17 | Procede de realisation de transistor a nanofil semi-conducteur et comprenant une grille et des espaceurs auto-alignes |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9853124B2 (fr) |
| FR (1) | FR3043837B1 (fr) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9899387B2 (en) * | 2015-11-16 | 2018-02-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-gate device and method of fabrication thereof |
| FR3051970B1 (fr) | 2016-05-25 | 2020-06-12 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Realisation d'une structure de canal formee d'une pluralite de barreaux semi-conducteurs contraints |
| US9831324B1 (en) * | 2016-08-12 | 2017-11-28 | International Business Machines Corporation | Self-aligned inner-spacer replacement process using implantation |
| US10340340B2 (en) * | 2016-10-20 | 2019-07-02 | International Business Machines Corporation | Multiple-threshold nanosheet transistors |
| US10297663B2 (en) * | 2017-04-19 | 2019-05-21 | International Business Machines Corporation | Gate fill utilizing replacement spacer |
| US10541318B2 (en) * | 2017-04-28 | 2020-01-21 | International Business Machines Corporation | Prevention of extension narrowing in nanosheet field effect transistors |
| US10193090B2 (en) * | 2017-06-20 | 2019-01-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of manufacturing a semiconductor device and a semiconductor device |
| US10418493B2 (en) * | 2017-12-19 | 2019-09-17 | International Business Machines Corporation | Tight pitch stack nanowire isolation |
| EP3567003A1 (fr) * | 2018-05-11 | 2019-11-13 | IMEC vzw | Procédé de fabrication auto-aligné d'un transistor avec plusiers caneaux nanofil ou nanosheet, avec un espaceur comprenant du résine exposé au euv et du résine non-exposé |
| FR3088480B1 (fr) | 2018-11-09 | 2020-12-04 | Commissariat Energie Atomique | Procede de collage avec desorption stimulee electroniquement |
| FR3091619B1 (fr) | 2019-01-07 | 2021-01-29 | Commissariat Energie Atomique | Procédé de guérison avant transfert d’une couche semi-conductrice |
| US11062937B2 (en) * | 2019-01-11 | 2021-07-13 | International Business Machines Corporation | Dielectric isolation for nanosheet devices |
| CN113257919A (zh) * | 2021-04-29 | 2021-08-13 | 中国科学院微电子研究所 | 带支撑部的纳米线/片器件及其制造方法及电子设备 |
| FR3123502B1 (fr) | 2021-05-27 | 2024-01-05 | Commissariat Energie Atomique | Procédé de fabrication d'un transistor a structure de grille enrobante |
| US20240355904A1 (en) * | 2023-04-21 | 2024-10-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device structure and methods of forming the same |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080135949A1 (en) | 2006-12-08 | 2008-06-12 | Agency For Science, Technology And Research | Stacked silicon-germanium nanowire structure and method of forming the same |
| US8551833B2 (en) * | 2011-06-15 | 2013-10-08 | International Businesss Machines Corporation | Double gate planar field effect transistors |
| US8685823B2 (en) * | 2011-11-09 | 2014-04-01 | International Business Machines Corporation | Nanowire field effect transistor device |
| FR2989515B1 (fr) | 2012-04-16 | 2015-01-16 | Commissariat Energie Atomique | Procede ameliore de realisation d'une structure de transistor a nano-fils superposes et a grille enrobante |
| US9190498B2 (en) * | 2012-09-14 | 2015-11-17 | Varian Semiconductor Equipment Associates, Inc. | Technique for forming a FinFET device using selective ion implantation |
| US8679902B1 (en) | 2012-09-27 | 2014-03-25 | International Business Machines Corporation | Stacked nanowire field effect transistor |
| US8969145B2 (en) * | 2013-01-19 | 2015-03-03 | International Business Machines Corporation | Wire-last integration method and structure for III-V nanowire devices |
| US8927397B2 (en) * | 2013-02-07 | 2015-01-06 | International Business Machines Corporation | Diode structure and method for gate all around silicon nanowire technologies |
| US9287358B2 (en) * | 2014-03-21 | 2016-03-15 | International Business Machines Corporation | Stressed nanowire stack for field effect transistor |
| US9614068B2 (en) * | 2015-09-02 | 2017-04-04 | Samsung Electronics Co., Ltd. | Semiconductor device and method of fabricating the same |
| US9607900B1 (en) * | 2015-09-10 | 2017-03-28 | International Business Machines Corporation | Method and structure to fabricate closely packed hybrid nanowires at scaled pitch |
-
2015
- 2015-11-17 FR FR1561044A patent/FR3043837B1/fr active Active
-
2016
- 2016-11-15 US US15/352,198 patent/US9853124B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| FR3043837A1 (fr) | 2017-05-19 |
| US20170141212A1 (en) | 2017-05-18 |
| US9853124B2 (en) | 2017-12-26 |
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