FR3049111B1 - Procede de realisation de transistors mos et bipolaires - Google Patents

Procede de realisation de transistors mos et bipolaires Download PDF

Info

Publication number
FR3049111B1
FR3049111B1 FR1652379A FR1652379A FR3049111B1 FR 3049111 B1 FR3049111 B1 FR 3049111B1 FR 1652379 A FR1652379 A FR 1652379A FR 1652379 A FR1652379 A FR 1652379A FR 3049111 B1 FR3049111 B1 FR 3049111B1
Authority
FR
France
Prior art keywords
bipolar transistors
making mos
mos
making
bipolar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1652379A
Other languages
English (en)
Other versions
FR3049111A1 (fr
Inventor
Olivier Weber
Emmanuel Richard
Philippe Boivin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Crolles 2 SAS
STMicroelectronics Rousset SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
STMicroelectronics Crolles 2 SAS
STMicroelectronics Rousset SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, STMicroelectronics Crolles 2 SAS, STMicroelectronics Rousset SAS, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1652379A priority Critical patent/FR3049111B1/fr
Priority to US15/454,788 priority patent/US9929146B2/en
Publication of FR3049111A1 publication Critical patent/FR3049111A1/fr
Priority to US15/897,524 priority patent/US10381344B2/en
Application granted granted Critical
Publication of FR3049111B1 publication Critical patent/FR3049111B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/10—Phase change RAM [PCRAM, PRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • H10B63/32—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors of the bipolar type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H10D10/056—Manufacture or treatment of vertical BJTs of vertical BJTs having the main current going through the whole substrate, e.g. power BJTs
    • H10D10/058—Manufacture or treatment of vertical BJTs of vertical BJTs having the main current going through the whole substrate, e.g. power BJTs having multi-emitter structures, e.g. interdigitated, multi-cellular or distributed emitters
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs
    • H10D62/135—Non-interconnected multi-emitter structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/231—Emitter or collector electrodes for bipolar transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/253—Multistable switching devices, e.g. memristors having three or more electrodes, e.g. transistor-like devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H10N70/8413—Electrodes adapted for resistive heating

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Element Separation (AREA)
FR1652379A 2016-03-21 2016-03-21 Procede de realisation de transistors mos et bipolaires Active FR3049111B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1652379A FR3049111B1 (fr) 2016-03-21 2016-03-21 Procede de realisation de transistors mos et bipolaires
US15/454,788 US9929146B2 (en) 2016-03-21 2017-03-09 Method of forming MOS and bipolar transistors
US15/897,524 US10381344B2 (en) 2016-03-21 2018-02-15 Method of forming MOS and bipolar transistors

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1652379 2016-03-21
FR1652379A FR3049111B1 (fr) 2016-03-21 2016-03-21 Procede de realisation de transistors mos et bipolaires

Publications (2)

Publication Number Publication Date
FR3049111A1 FR3049111A1 (fr) 2017-09-22
FR3049111B1 true FR3049111B1 (fr) 2018-04-13

Family

ID=56148449

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1652379A Active FR3049111B1 (fr) 2016-03-21 2016-03-21 Procede de realisation de transistors mos et bipolaires

Country Status (2)

Country Link
US (2) US9929146B2 (fr)
FR (1) FR3049111B1 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3049111B1 (fr) * 2016-03-21 2018-04-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de realisation de transistors mos et bipolaires
US10217831B1 (en) * 2017-08-31 2019-02-26 Vanguard International Semiconductor Corporation High electron mobility transistor devices
US10109638B1 (en) * 2017-10-23 2018-10-23 Globalfoundries Singapore Pte. Ltd. Embedded non-volatile memory (NVM) on fully depleted silicon-on-insulator (FD-SOI) substrate
FR3109838B1 (fr) * 2020-04-30 2022-05-20 St Microelectronics Crolles 2 Sas Transistors contraints et mémoire à changement de phase
US20230411450A1 (en) * 2022-06-16 2023-12-21 Stmicroelectronics (Crolles 2) Sas Electronic device manufacturing method
US20240147737A1 (en) * 2022-10-27 2024-05-02 Stmicroelectronics (Crolles 2) Sas Method of fabricating an electronic chip including a memory circuit
US20240306401A1 (en) * 2023-03-06 2024-09-12 Stmicroelectronics International N.V. Method of manufacturing an electronic chip comprising a memory circuit
US20250107104A1 (en) * 2023-09-25 2025-03-27 Taiwan Semiconductor Manufacturing Company Limited Low cross-talk noise resistive memory devices on a soi substrate and methods of making the same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6365447B1 (en) * 1998-01-12 2002-04-02 National Semiconductor Corporation High-voltage complementary bipolar and BiCMOS technology using double expitaxial growth
US6790722B1 (en) * 2000-11-22 2004-09-14 International Business Machines Corporation Logic SOI structure, process and application for vertical bipolar transistor
KR100432887B1 (ko) * 2002-03-05 2004-05-22 삼성전자주식회사 다중격리구조를 갖는 반도체 소자 및 그 제조방법
US7791161B2 (en) * 2005-08-25 2010-09-07 Freescale Semiconductor, Inc. Semiconductor devices employing poly-filled trenches
EP1791181B1 (fr) * 2005-11-25 2010-02-03 STMicroelectronics S.r.l. Structure d'un transistor à capacité de haute impédence à un courant élevé et son procédé de fabrication
ITTO20060525A1 (it) * 2006-07-18 2008-01-19 St Microelectronics Srl Dispositivo bipolare integrato di tipo verticale e relativo procedimento per la sua fabbricazione
US8815654B2 (en) * 2007-06-14 2014-08-26 International Business Machines Corporation Vertical current controlled silicon on insulator (SOI) device such as a silicon controlled rectifier and method of forming vertical SOI current controlled devices
US8212292B2 (en) * 2009-11-20 2012-07-03 Freescale Semiconductor, Inc. High gain tunable bipolar transistor
FR3049111B1 (fr) * 2016-03-21 2018-04-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de realisation de transistors mos et bipolaires

Also Published As

Publication number Publication date
US10381344B2 (en) 2019-08-13
US20180175022A1 (en) 2018-06-21
FR3049111A1 (fr) 2017-09-22
US9929146B2 (en) 2018-03-27
US20170271325A1 (en) 2017-09-21

Similar Documents

Publication Publication Date Title
IL290670A (en) Sterilisation method
ZA201801800B (en) Device and method for online health management of insulated gate bipolar transistor
EP3559997A4 (fr) Dispositifs et techniques de transistors verticaux
IL261635A (en) Assembly and method for frothing milk
BR112016026035A2 (pt) método e dispositivo de obtenção de certificados.
FR3021455B1 (fr) Procede d'aplanissement d'evidements remplis de cuivre
PL3386655T3 (pl) Sposób przetwarzania odpadów
EP3564382A4 (fr) Produit fermenté, et procédé de fabrication de celui-ci
EP3508059A4 (fr) Système d'alimentation et procédé d'alimentation
EP3826420C0 (fr) Procédé de contention de canaux et appareil correspondant
PL3117465T3 (pl) Heterozłączowy tranzystor polowy
EP3240042A4 (fr) Transistor bipolaire latéral à grille isolée et son procédé de fabrication
FR3033665B1 (fr) Transistor a electron unique et son procede de realisation
LU92738B1 (fr) Procede et installation de preparation de biomasse
PL3316693T3 (pl) Sposób obróbki mleka
FR3018952B1 (fr) Structure integree comportant des transistors mos voisins
EP3256667C0 (fr) Module de plancher de trou de drainage et procédé de production correspondant
EP3753854C0 (fr) Appareil d'acheminement de découpes et procédé d'acheminement de découpes l'utilisant
EP3524273A4 (fr) Conjugué médicament-anticorps modifié par cystéine et son procédé de préparation
GB201612830D0 (en) Field-effect transistor and method for the production thereof
PT3713618T (pt) Dispositivo e método de produção de dialisante
TWI562357B (en) Semiconductor device, transistor device and method for forming contacts for transistors
FR3046492B1 (fr) Procede de realisation de transistors mos contraints
PL3542479T3 (pl) Sposób i urządzenie do nadawania danych techniki domowej
FR3072286B1 (fr) 7-amino-1,2,3,4-tetrahydroquinoleines particuliers, procede et composition

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 2

PLSC Publication of the preliminary search report

Effective date: 20170922

PLFP Fee payment

Year of fee payment: 3

PLFP Fee payment

Year of fee payment: 5

PLFP Fee payment

Year of fee payment: 6

PLFP Fee payment

Year of fee payment: 7

PLFP Fee payment

Year of fee payment: 8

PLFP Fee payment

Year of fee payment: 9

PLFP Fee payment

Year of fee payment: 10

PLFP Fee payment

Year of fee payment: 11