PL3117465T3 - Heterozłączowy tranzystor polowy - Google Patents

Heterozłączowy tranzystor polowy

Info

Publication number
PL3117465T3
PL3117465T3 PL15717017.6T PL15717017T PL3117465T3 PL 3117465 T3 PL3117465 T3 PL 3117465T3 PL 15717017 T PL15717017 T PL 15717017T PL 3117465 T3 PL3117465 T3 PL 3117465T3
Authority
PL
Poland
Prior art keywords
field effect
effect transistor
heterojunction field
heterojunction
transistor
Prior art date
Application number
PL15717017.6T
Other languages
English (en)
Inventor
Peter Frijlink
Original Assignee
Ommic
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ommic filed Critical Ommic
Publication of PL3117465T3 publication Critical patent/PL3117465T3/pl

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/473—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT
    • H10D30/4732—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT using Group III-V semiconductor material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/854—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs further characterised by the dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3416—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3466—Crystal orientation
PL15717017.6T 2014-03-14 2015-03-10 Heterozłączowy tranzystor polowy PL3117465T3 (pl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1452132A FR3018629B1 (fr) 2014-03-14 2014-03-14 Structure semiconductrice formant transistor hemt
PCT/FR2015/050600 WO2015136218A1 (fr) 2014-03-14 2015-03-10 Transistor a effet de champ et a heterojonction.

Publications (1)

Publication Number Publication Date
PL3117465T3 true PL3117465T3 (pl) 2022-11-28

Family

ID=51014442

Family Applications (1)

Application Number Title Priority Date Filing Date
PL15717017.6T PL3117465T3 (pl) 2014-03-14 2015-03-10 Heterozłączowy tranzystor polowy

Country Status (10)

Country Link
US (1) US10340376B2 (pl)
EP (1) EP3117465B1 (pl)
JP (1) JP6933466B2 (pl)
KR (1) KR102329663B1 (pl)
ES (1) ES2927683T3 (pl)
FR (1) FR3018629B1 (pl)
PL (1) PL3117465T3 (pl)
RU (1) RU2686575C2 (pl)
TW (1) TWI675480B (pl)
WO (1) WO2015136218A1 (pl)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6627408B2 (ja) * 2015-10-21 2020-01-08 住友電気工業株式会社 半導体装置及び半導体装置の製造方法
US10388753B1 (en) * 2017-03-31 2019-08-20 National Technology & Engineering Solutions Of Sandia, Llc Regrowth method for fabricating wide-bandgap transistors, and devices made thereby
JP7013710B2 (ja) * 2017-08-07 2022-02-01 住友電気工業株式会社 窒化物半導体トランジスタの製造方法
CN107742644B (zh) * 2017-10-30 2024-05-28 中山大学 一种高性能常关型的GaN场效应晶体管及其制备方法
JP7099255B2 (ja) * 2018-11-01 2022-07-12 富士通株式会社 化合物半導体装置、高周波増幅器及び電源装置
US10964803B2 (en) 2018-11-19 2021-03-30 Texas Instruments Incorporated Gallium nitride transistor with a doped region
JP2021144993A (ja) 2020-03-10 2021-09-24 富士通株式会社 半導体装置
US11978790B2 (en) 2020-12-01 2024-05-07 Texas Instruments Incorporated Normally-on gallium nitride based transistor with p-type gate
JP7620203B2 (ja) * 2021-04-22 2025-01-23 富士通株式会社 半導体装置、半導体装置の製造方法及び電子装置
JP7687940B2 (ja) * 2021-12-14 2025-06-03 株式会社東芝 半導体装置

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4742399B2 (ja) * 1999-03-12 2011-08-10 住友化学株式会社 3−5族化合物半導体の製造方法
JP2001135575A (ja) * 1999-03-12 2001-05-18 Sumitomo Chem Co Ltd 3−5族化合物半導体
JP3518455B2 (ja) * 1999-12-15 2004-04-12 日亜化学工業株式会社 窒化物半導体基板の作製方法
JP3430206B2 (ja) * 2000-06-16 2003-07-28 学校法人 名城大学 半導体素子の製造方法及び半導体素子
US7432142B2 (en) * 2004-05-20 2008-10-07 Cree, Inc. Methods of fabricating nitride-based transistors having regrown ohmic contact regions
JP2006013006A (ja) * 2004-06-23 2006-01-12 Shin Etsu Handotai Co Ltd 半導体複合基板及びそれを用いた化合物半導体素子
JP2008085215A (ja) * 2006-09-28 2008-04-10 Oki Electric Ind Co Ltd 半導体装置の製造方法
JP2008124262A (ja) * 2006-11-13 2008-05-29 Oki Electric Ind Co Ltd 選択再成長を用いたAlGaN/GaN−HEMTの製造方法
US8017933B2 (en) * 2008-06-30 2011-09-13 Intel Corporation Compositionally-graded quantum-well channels for semiconductor devices
KR101666910B1 (ko) * 2009-04-08 2016-10-17 이피션트 파워 컨버젼 코퍼레이션 증가형 GaN HEMT 장치 및 그 제조 방법
JP5702058B2 (ja) * 2009-08-28 2015-04-15 日本碍子株式会社 半導体素子用エピタキシャル基板、半導体素子、および、半導体素子用エピタキシャル基板の作製方法
KR101890749B1 (ko) * 2011-10-27 2018-08-23 삼성전자주식회사 전극구조체, 이를 포함하는 질화갈륨계 반도체소자 및 이들의 제조방법
JP5881383B2 (ja) * 2011-11-17 2016-03-09 株式会社豊田中央研究所 半導体装置とその製造方法
US10164038B2 (en) * 2013-01-30 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Method of implanting dopants into a group III-nitride structure and device formed
RU136238U1 (ru) * 2013-07-04 2013-12-27 Открытое акционерное общество "Научно-производственное предприятие "Пульсар" Гетероструктурный модулировано-легированный полевой транзистор
US9159822B2 (en) * 2014-02-24 2015-10-13 International Business Machines Corporation III-V semiconductor device having self-aligned contacts

Also Published As

Publication number Publication date
EP3117465A1 (fr) 2017-01-18
ES2927683T3 (es) 2022-11-10
FR3018629A1 (fr) 2015-09-18
US10340376B2 (en) 2019-07-02
WO2015136218A1 (fr) 2015-09-17
US20170092751A1 (en) 2017-03-30
KR102329663B1 (ko) 2021-11-22
JP2017514316A (ja) 2017-06-01
TW201539742A (zh) 2015-10-16
JP6933466B2 (ja) 2021-09-08
RU2686575C2 (ru) 2019-04-29
RU2016140219A3 (pl) 2018-10-31
KR20160132108A (ko) 2016-11-16
EP3117465B1 (fr) 2022-07-20
RU2016140219A (ru) 2018-04-17
FR3018629B1 (fr) 2022-10-28
TWI675480B (zh) 2019-10-21

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