FR3114882B1 - Circuit de test - Google Patents

Circuit de test Download PDF

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Publication number
FR3114882B1
FR3114882B1 FR2010070A FR2010070A FR3114882B1 FR 3114882 B1 FR3114882 B1 FR 3114882B1 FR 2010070 A FR2010070 A FR 2010070A FR 2010070 A FR2010070 A FR 2010070A FR 3114882 B1 FR3114882 B1 FR 3114882B1
Authority
FR
France
Prior art keywords
circuit
test circuit
test
data signal
input data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2010070A
Other languages
English (en)
Other versions
FR3114882A1 (fr
Inventor
Francois Tailliet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR2010070A priority Critical patent/FR3114882B1/fr
Priority to US17/468,377 priority patent/US11815547B2/en
Priority to CN202111162449.4A priority patent/CN114373692A/zh
Publication of FR3114882A1 publication Critical patent/FR3114882A1/fr
Application granted granted Critical
Publication of FR3114882B1 publication Critical patent/FR3114882B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/06766—Input circuits therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2889—Interfaces, e.g. between probe and tester
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/277—Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/40—Arrangements for protection of devices protecting against tampering, e.g. unauthorised inspection or reverse engineering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/40—Arrangements for protection of devices protecting against tampering, e.g. unauthorised inspection or reverse engineering
    • H10W42/405—Arrangements for protection of devices protecting against tampering, e.g. unauthorised inspection or reverse engineering using active circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Circuit de test La présente description concerne un circuit intégré (20) comprenant un circuit de test (24) comprenant : - une piste conductrice (241) s'étendant sur au moins une partie de la périphérie dudit circuit intégré (20) ; - au moins un composant (23) ; et - un circuit d'activation (243) adapté à dévier un signal de données d'entrée (DT1) dans ladite piste conductrice (241) pendant un mode de test, et à transmettre le signal de données d'entrée (DT1) audit au moins un composant (23) pendant un mode normal de fonctionnement. Figure pour l'abrégé : Fig. 2
FR2010070A 2020-10-01 2020-10-01 Circuit de test Active FR3114882B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR2010070A FR3114882B1 (fr) 2020-10-01 2020-10-01 Circuit de test
US17/468,377 US11815547B2 (en) 2020-10-01 2021-09-07 Test circuit
CN202111162449.4A CN114373692A (zh) 2020-10-01 2021-09-30 测试电路

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2010070 2020-10-01
FR2010070A FR3114882B1 (fr) 2020-10-01 2020-10-01 Circuit de test

Publications (2)

Publication Number Publication Date
FR3114882A1 FR3114882A1 (fr) 2022-04-08
FR3114882B1 true FR3114882B1 (fr) 2023-05-12

Family

ID=73643106

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2010070A Active FR3114882B1 (fr) 2020-10-01 2020-10-01 Circuit de test

Country Status (3)

Country Link
US (1) US11815547B2 (fr)
CN (1) CN114373692A (fr)
FR (1) FR3114882B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12557604B2 (en) 2024-03-15 2026-02-17 Nxp B.V. Degradation circuit

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4801869A (en) 1987-04-27 1989-01-31 International Business Machines Corporation Semiconductor defect monitor for diagnosing processing-induced defects
US5723990A (en) * 1995-06-21 1998-03-03 Micron Quantum Devices, Inc. Integrated circuit having high voltage detection circuit
US6124143A (en) * 1998-01-26 2000-09-26 Lsi Logic Corporation Process monitor circuitry for integrated circuits
US6163867A (en) 1998-08-28 2000-12-19 Hewlett-Packard Company Input-output pad testing using bi-directional pads
US6449748B1 (en) 1999-08-09 2002-09-10 Lsi Logic Corporation Non-destructive method of detecting die crack problems
DE20005123U1 (de) * 2000-03-20 2001-08-02 atg test systems GmbH & Co. KG Reicholzheim, 97877 Wertheim Vorrichtung zum Prüfen von Leiterplatten
US6621280B1 (en) 2000-06-27 2003-09-16 Agere Systems Inc. Method of testing an integrated circuit
JP2006038988A (ja) 2004-07-23 2006-02-09 Seiko Epson Corp 電気光学装置、電子機器、および実装構造体
KR100750192B1 (ko) * 2006-05-04 2007-08-17 삼성전자주식회사 크랙 검사 회로를 갖는 반도체 칩 및 이를 이용한 크랙검사 방법
JP4370343B2 (ja) * 2006-07-07 2009-11-25 シャープ株式会社 不具合検出機能を備えた半導体装置
EP1892535A1 (fr) 2006-08-25 2008-02-27 Stmicroelectronics Sa Procédé de test électrique d' un circuit intégré
KR100794313B1 (ko) * 2006-12-27 2008-01-11 삼성전자주식회사 범프 패드를 포함한 반도체 메모리 장치 및 그것의 테스트방법
JP2010118408A (ja) * 2008-11-11 2010-05-27 Nec Electronics Corp 半導体装置、半導体装置の試験方法
JP2012007978A (ja) * 2010-06-24 2012-01-12 On Semiconductor Trading Ltd 半導体集積回路
ITMI20111418A1 (it) * 2011-07-28 2013-01-29 St Microelectronics Srl Architettura di testing di circuiti integrati su un wafer
CN107728042B (zh) * 2017-11-13 2023-08-22 长鑫存储技术有限公司 具有保护测试的集成电路及其测试方法

Also Published As

Publication number Publication date
FR3114882A1 (fr) 2022-04-08
US20220107356A1 (en) 2022-04-07
CN114373692A (zh) 2022-04-19
US11815547B2 (en) 2023-11-14

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