FR3133508B1 - Dispositif comportant un circuit de synchronisation pour realiser une communication en champ proche - Google Patents

Dispositif comportant un circuit de synchronisation pour realiser une communication en champ proche Download PDF

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Publication number
FR3133508B1
FR3133508B1 FR2202164A FR2202164A FR3133508B1 FR 3133508 B1 FR3133508 B1 FR 3133508B1 FR 2202164 A FR2202164 A FR 2202164A FR 2202164 A FR2202164 A FR 2202164A FR 3133508 B1 FR3133508 B1 FR 3133508B1
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FR
France
Prior art keywords
signal
oscillator
domain
frequency
carrier signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2202164A
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English (en)
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FR3133508A1 (fr
Inventor
Grégoire Montjaux
Marc Houdebine
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Grenoble 2 SAS
STMicroelectronics France SAS
Original Assignee
STMicroelectronics SA
STMicroelectronics Grenoble 2 SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA, STMicroelectronics Grenoble 2 SAS filed Critical STMicroelectronics SA
Priority to FR2202164A priority Critical patent/FR3133508B1/fr
Priority to US18/174,236 priority patent/US12483249B2/en
Priority to CN202310227633.5A priority patent/CN116743335B/zh
Publication of FR3133508A1 publication Critical patent/FR3133508A1/fr
Application granted granted Critical
Publication of FR3133508B1 publication Critical patent/FR3133508B1/fr
Priority to US19/359,910 priority patent/US20260045953A1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0994Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising an accumulator
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/50All digital phase-locked loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/40Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by components specially adapted for near-field transmission
    • H04B5/45Transponders

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

Selon un aspect, il est proposé un dispositif (DIS) configuré pour recevoir un premier signal de porteuse (Fref), pour délivrer un deuxième signal de porteuse (ALM) et comprenant une boucle à verrouillage de phase (PLL) comportant : - un premier domaine (ANLG) comportant un oscillateur (DCO) configuré pour générer un signal à une fréquence donnée, et un circuit configuré pour générer des informations représentatives de la fréquence du signal généré par l’oscillateur, et pour générer ledit deuxième signal de porteuse et un signal d’horloge, le premier domaine étant cadencé par le premier signal de porteuse, - un deuxième domaine (DGTL), cadencé par ledit signal d’horloge, comportant un circuit configuré pour comparer la fréquence du signal généré par l’oscillateur à la fréquence du premier signal de porteuse et pour contrôler l’oscillateur, - un circuit d’adaptation configuré pour transférer les informations représentatives de la fréquence du signal généré par l’oscillateur du premier domaine au deuxième domaine. Figure pour l’abrégé : Figure 1
FR2202164A 2022-03-11 2022-03-11 Dispositif comportant un circuit de synchronisation pour realiser une communication en champ proche Active FR3133508B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR2202164A FR3133508B1 (fr) 2022-03-11 2022-03-11 Dispositif comportant un circuit de synchronisation pour realiser une communication en champ proche
US18/174,236 US12483249B2 (en) 2022-03-11 2023-02-24 Device comprising a synchronization circuit for performing near field communication
CN202310227633.5A CN116743335B (zh) 2022-03-11 2023-03-10 包括用于执行近场通信的同步电路的装置
US19/359,910 US20260045953A1 (en) 2022-03-11 2025-10-16 Device comprising a synchronization circuit for performing near field communication

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2202164 2022-03-11
FR2202164A FR3133508B1 (fr) 2022-03-11 2022-03-11 Dispositif comportant un circuit de synchronisation pour realiser une communication en champ proche

Publications (2)

Publication Number Publication Date
FR3133508A1 FR3133508A1 (fr) 2023-09-15
FR3133508B1 true FR3133508B1 (fr) 2024-03-15

Family

ID=82319689

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2202164A Active FR3133508B1 (fr) 2022-03-11 2022-03-11 Dispositif comportant un circuit de synchronisation pour realiser une communication en champ proche

Country Status (2)

Country Link
US (1) US12483249B2 (fr)
FR (1) FR3133508B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116743335B (zh) * 2022-03-11 2026-04-03 意法半导体法国公司 包括用于执行近场通信的同步电路的装置
FR3133508B1 (fr) 2022-03-11 2024-03-15 St Microelectronics Grenoble 2 Dispositif comportant un circuit de synchronisation pour realiser une communication en champ proche

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7733138B2 (en) * 2005-09-14 2010-06-08 Silicon Laboratories, Inc. False lock detection mechanism for use in a delay locked loop circuit
TWI311409B (en) * 2006-06-16 2009-06-21 Realtek Semiconductor Corp Reset method of digital circuit and related signal generating apparatus
FR2965082B1 (fr) 2010-09-21 2012-09-28 Inside Contactless Procede et dispositif de modulation de charge active par couplage inductif
US9811113B2 (en) * 2015-11-11 2017-11-07 Linear Technology Corporation System and method for synchronization among multiple PLL-based clock signals
FR3054760A1 (fr) 2016-07-27 2018-02-02 Stmicroelectronics Sa Procede de communication sans contact entre un objet, par exemple un telephone mobile emule en mode carte, et un lecteur par modulation active de charge
SG10201608437WA (en) 2016-10-07 2018-05-30 Huawei Int Pte Ltd Active load modulation technique in near field communication
FR3077174B1 (fr) 2018-01-19 2021-04-09 St Microelectronics Sa Synchronisation entre un lecteur et un objet communiquant sans contact avec le lecteur par modulation active de charge
US10491222B2 (en) * 2018-03-13 2019-11-26 Texas Instruments Incorporated Switch between input reference clocks of different frequencies in a phase locked loop (PLL) without phase impact
FR3086476B1 (fr) 2018-09-25 2020-09-11 St Microelectronics Sa Synchronisation rapide entre un objet et un lecteur communiquant sans contact par une modulation active de charge
FR3133508B1 (fr) 2022-03-11 2024-03-15 St Microelectronics Grenoble 2 Dispositif comportant un circuit de synchronisation pour realiser une communication en champ proche

Also Published As

Publication number Publication date
US12483249B2 (en) 2025-11-25
FR3133508A1 (fr) 2023-09-15
US20230318658A1 (en) 2023-10-05

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