GR3015779T3 - Synchronisation method of a counter generated clock on a reference clock. - Google Patents

Synchronisation method of a counter generated clock on a reference clock.

Info

Publication number
GR3015779T3
GR3015779T3 GR950400884T GR950400884T GR3015779T3 GR 3015779 T3 GR3015779 T3 GR 3015779T3 GR 950400884 T GR950400884 T GR 950400884T GR 950400884 T GR950400884 T GR 950400884T GR 3015779 T3 GR3015779 T3 GR 3015779T3
Authority
GR
Greece
Prior art keywords
clock
reference clock
synchronisation
phase
synchronisation method
Prior art date
Application number
GR950400884T
Other languages
English (en)
Inventor
Wolfgang Dipl-Ing Ernst
Gerhard Dipl Phys Uhlig
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of GR3015779T3 publication Critical patent/GR3015779T3/el

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Electric Clocks (AREA)
  • Communication Control (AREA)
  • Synchronizing For Television (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
GR950400884T 1989-05-31 1995-04-13 Synchronisation method of a counter generated clock on a reference clock. GR3015779T3 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3917712 1989-05-31

Publications (1)

Publication Number Publication Date
GR3015779T3 true GR3015779T3 (en) 1995-07-31

Family

ID=6381764

Family Applications (1)

Application Number Title Priority Date Filing Date
GR950400884T GR3015779T3 (en) 1989-05-31 1995-04-13 Synchronisation method of a counter generated clock on a reference clock.

Country Status (6)

Country Link
US (1) US5052030A (el)
EP (1) EP0400397B1 (el)
AT (1) ATE121238T1 (el)
DE (1) DE59008876D1 (el)
ES (1) ES2070205T3 (el)
GR (1) GR3015779T3 (el)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5151591A (en) * 1991-03-20 1992-09-29 Honeywell Inc. Asynchronous signal interrogation circuit for an detection apparatus
US5381542A (en) * 1991-07-29 1995-01-10 Unisys Corporation System for switching between a plurality of clock sources upon detection of phase alignment thereof and disabling all other clock sources
DE4232037A1 (de) * 1992-09-24 1994-03-31 Siemens Ag Schaltung mit zwei sich gegenseitig synchronisierenden spannungsgeregelten Oszillatoren
US6308077B1 (en) * 1992-10-02 2001-10-23 Motorola, Inc. Apparatus and method for providing synchronization of base-stations in a communication system
SE9300679L (sv) * 1993-03-01 1994-09-02 Ellemtel Utvecklings Ab Bitsynkroniserare
JPH075949A (ja) * 1993-06-18 1995-01-10 Nec Corp ２重化クロック切替えの方法と装置
US5672988A (en) * 1994-04-15 1997-09-30 Linear Technology Corporation High-speed switching regulator drive circuit
US6970045B1 (en) 2003-06-25 2005-11-29 Nel Frequency Controls, Inc. Redundant clock module
JP7382980B2 (ja) 2021-02-26 2023-11-17 株式会社安川電機 コントローラ、機器制御システム、時刻同期方法、および時刻同期プログラム
JP7248044B2 (ja) * 2021-02-26 2023-03-29 株式会社安川電機 コントローラ、機器制御システム、時刻同期方法、および時刻同期プログラム

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT7825268A0 (it) * 1978-07-03 1978-07-03 Sits Soc It Telecom Siemens Disposizione circuitale per individuare l'elemento guasto in una pluralita' di oscillatori controllati in fase.
US4282493A (en) * 1979-07-02 1981-08-04 Motorola, Inc. Redundant clock signal generating circuitry
FR2546691B1 (fr) * 1983-05-27 1985-07-05 Cit Alcatel Base de temps asservie
US4583054A (en) * 1984-11-13 1986-04-15 Rca Corporation Frequency time standard failure monitor
US4651103A (en) * 1985-12-30 1987-03-17 At&T Company Phase adjustment system

Also Published As

Publication number Publication date
ATE121238T1 (de) 1995-04-15
DE59008876D1 (de) 1995-05-18
EP0400397A2 (de) 1990-12-05
EP0400397B1 (de) 1995-04-12
ES2070205T3 (es) 1995-06-01
EP0400397A3 (de) 1991-05-02
US5052030A (en) 1991-09-24

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