IL154135A0 - Method for making a circuitry comprising conductive tracks, chips and micro-vias and use of same for producing printed circuits and multilayer modules with high density of integration - Google Patents

Method for making a circuitry comprising conductive tracks, chips and micro-vias and use of same for producing printed circuits and multilayer modules with high density of integration

Info

Publication number
IL154135A0
IL154135A0 IL15413501A IL15413501A IL154135A0 IL 154135 A0 IL154135 A0 IL 154135A0 IL 15413501 A IL15413501 A IL 15413501A IL 15413501 A IL15413501 A IL 15413501A IL 154135 A0 IL154135 A0 IL 154135A0
Authority
IL
Israel
Prior art keywords
vias
chips
circuitry
integration
micro
Prior art date
Application number
IL15413501A
Other languages
English (en)
Original Assignee
Kermel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kermel filed Critical Kermel
Publication of IL154135A0 publication Critical patent/IL154135A0/xx

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0236Plating catalyst as filler in insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • H05K2203/073Displacement plating, substitution plating or immersion plating, e.g. for finish plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1157Using means for chemical reduction
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/12Using specific substances
    • H05K2203/125Inorganic compounds, e.g. silver salt
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/182Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
    • H05K3/184Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Chemically Coating (AREA)
IL15413501A 2000-07-27 2001-07-26 Method for making a circuitry comprising conductive tracks, chips and micro-vias and use of same for producing printed circuits and multilayer modules with high density of integration IL154135A0 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0009879A FR2812515B1 (fr) 2000-07-27 2000-07-27 Procede de realisation d'une circuiterie comportant pistes, pastilles et microtraversees conductrices et utilisation de ce procede pour la realisation de circuits imprimes et de modules multicouches a haute densite d'integration
PCT/FR2001/002465 WO2002011503A1 (fr) 2000-07-27 2001-07-26 Procede de realisation d'une circuiterie comportant pistes, pastilles et microtraversees conductrices et utilisation de ce procede pour la realisation de circuits imprimes et de modules multicouches a haute densite d'integration

Publications (1)

Publication Number Publication Date
IL154135A0 true IL154135A0 (en) 2003-07-31

Family

ID=8852994

Family Applications (1)

Application Number Title Priority Date Filing Date
IL15413501A IL154135A0 (en) 2000-07-27 2001-07-26 Method for making a circuitry comprising conductive tracks, chips and micro-vias and use of same for producing printed circuits and multilayer modules with high density of integration

Country Status (14)

Country Link
US (1) US20040048050A1 (ru)
EP (1) EP1304022A1 (ru)
JP (1) JP2002050873A (ru)
KR (1) KR20020022123A (ru)
CN (1) CN1456034A (ru)
AU (1) AU2001282235A1 (ru)
BR (1) BR0113133A (ru)
CA (1) CA2417159A1 (ru)
FR (1) FR2812515B1 (ru)
IL (1) IL154135A0 (ru)
MX (1) MXPA03000797A (ru)
RU (1) RU2003105458A (ru)
TW (1) TW511438B (ru)
WO (1) WO2002011503A1 (ru)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005022556A2 (en) * 2003-09-02 2005-03-10 Integral Technologies, Inc. Very low resistance electrical interfaces to conductive loaded resin-based materials
KR100842517B1 (ko) * 2005-10-06 2008-07-01 삼성전자주식회사 통신 시스템에서 단말기의 전력 안정화 장치
US7517785B2 (en) * 2005-10-21 2009-04-14 General Electric Company Electronic interconnects and methods of making same
TWI270656B (en) * 2005-11-29 2007-01-11 Machvision Inc Analysis method for sag or protrusion of copper-filled micro via
JP4803549B2 (ja) * 2006-03-03 2011-10-26 地方独立行政法人 大阪市立工業研究所 亜酸化銅膜に金属銅層を形成する方法
KR100797719B1 (ko) 2006-05-10 2008-01-23 삼성전기주식회사 빌드업 인쇄회로기판의 제조공정
US7675162B2 (en) * 2006-10-03 2010-03-09 Innovative Micro Technology Interconnect structure using through wafer vias and method of fabrication
US7760507B2 (en) * 2007-12-26 2010-07-20 The Bergquist Company Thermally and electrically conductive interconnect structures
RU2382532C1 (ru) * 2008-07-08 2010-02-20 Федеральное государственное унитарное предприятие "Научно-производственное предприятие "Полет" Способ изготовления печатных плат
CN102206098B (zh) * 2010-03-30 2013-04-10 比亚迪股份有限公司 一种陶瓷覆铜基板及其制备方法
CN102452843B (zh) * 2010-10-30 2013-08-21 比亚迪股份有限公司 一种氧化铝陶瓷覆铜板及其制备方法
JP5595363B2 (ja) * 2011-09-30 2014-09-24 富士フイルム株式会社 穴付き積層体の製造方法、穴付き積層体、多層基板の製造方法、下地層形成用組成物
US9922951B1 (en) * 2016-11-12 2018-03-20 Sierra Circuits, Inc. Integrated circuit wafer integration with catalytic laminate or adhesive
CN113939112A (zh) * 2020-07-13 2022-01-14 庆鼎精密电子(淮安)有限公司 电路板的制造方法及电路板
US12389547B2 (en) * 2021-01-06 2025-08-12 International Business Machines Corporation Hybrid mechanical drill
CN113286441A (zh) * 2021-03-23 2021-08-20 广东工业大学 一种三明治结构式金属线路成型方法和金属线路清洗方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2518126B1 (fr) * 1981-12-14 1986-01-17 Rhone Poulenc Spec Chim Procede de metallisation d'articles electriquement isolants en matiere plastique et les articles intermediaires et finis obtenus selon ce procede
FR2566611A1 (fr) * 1984-06-25 1985-12-27 Rhone Poulenc Rech Nouveaux circuits imprimes injectes et procede d'obtention
US4737446A (en) * 1986-12-30 1988-04-12 E. I. Du Pont De Nemours And Company Method for making multilayer circuits using embedded catalyst receptors
DE3913966B4 (de) * 1988-04-28 2005-06-02 Ibiden Co., Ltd., Ogaki Klebstoffdispersion zum stromlosen Plattieren, sowie Verwendung zur Herstellung einer gedruckten Schaltung
US5110633A (en) * 1989-09-01 1992-05-05 Ciba-Geigy Corporation Process for coating plastics articles
US5162144A (en) * 1991-08-01 1992-11-10 Motorola, Inc. Process for metallizing substrates using starved-reaction metal-oxide reduction
US5679498A (en) * 1995-10-11 1997-10-21 Motorola, Inc. Method for producing high density multi-layer integrated circuit carriers
KR100336829B1 (ko) * 1998-04-10 2002-05-16 모기 쥰이찌 다층 배선 기판의 제조 방법

Also Published As

Publication number Publication date
WO2002011503A1 (fr) 2002-02-07
CN1456034A (zh) 2003-11-12
FR2812515B1 (fr) 2003-08-01
CA2417159A1 (fr) 2002-02-07
EP1304022A1 (fr) 2003-04-23
FR2812515A1 (fr) 2002-02-01
RU2003105458A (ru) 2004-08-20
AU2001282235A1 (en) 2002-02-13
BR0113133A (pt) 2005-01-11
KR20020022123A (ko) 2002-03-25
JP2002050873A (ja) 2002-02-15
US20040048050A1 (en) 2004-03-11
MXPA03000797A (es) 2004-11-01
TW511438B (en) 2002-11-21

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