IT1078689B - Componente a semiconduttori con almeno due zone di diverso tipo di conduzione,che formano una giunzione pn,e procedimento per la sua fabbricazione - Google Patents

Componente a semiconduttori con almeno due zone di diverso tipo di conduzione,che formano una giunzione pn,e procedimento per la sua fabbricazione

Info

Publication number
IT1078689B
IT1078689B IT24841/77A IT2484177A IT1078689B IT 1078689 B IT1078689 B IT 1078689B IT 24841/77 A IT24841/77 A IT 24841/77A IT 2484177 A IT2484177 A IT 2484177A IT 1078689 B IT1078689 B IT 1078689B
Authority
IT
Italy
Prior art keywords
conduct
junction
areas
procedure
manufacture
Prior art date
Application number
IT24841/77A
Other languages
English (en)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of IT1078689B publication Critical patent/IT1078689B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133Emitter regions of BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/50Physical imperfections
    • H10D62/53Physical imperfections the imperfections being within the semiconductor body 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/28Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00Gettering within semiconductor bodies
    • H10P36/03Gettering within semiconductor bodies within silicon bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/40Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections
    • H10P95/402Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/024Defect control-gettering and annealing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/061Gettering-armorphous layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/093Laser beam treatment in general
IT24841/77A 1976-06-22 1977-06-20 Componente a semiconduttori con almeno due zone di diverso tipo di conduzione,che formano una giunzione pn,e procedimento per la sua fabbricazione IT1078689B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19762627855 DE2627855A1 (de) 1976-06-22 1976-06-22 Halbleiterbauelement mit wenigstens zwei, einen pn-uebergang bildenden zonen unterschiedlichen leitungstyps sowie verfahren zu dessen herstellung

Publications (1)

Publication Number Publication Date
IT1078689B true IT1078689B (it) 1985-05-08

Family

ID=5981107

Family Applications (1)

Application Number Title Priority Date Filing Date
IT24841/77A IT1078689B (it) 1976-06-22 1977-06-20 Componente a semiconduttori con almeno due zone di diverso tipo di conduzione,che formano una giunzione pn,e procedimento per la sua fabbricazione

Country Status (6)

Country Link
US (1) US4216030A (it)
JP (1) JPS531476A (it)
DE (1) DE2627855A1 (it)
FR (1) FR2356277A1 (it)
GB (1) GB1558937A (it)
IT (1) IT1078689B (it)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2917455A1 (de) 1979-04-30 1980-11-13 Ibm Deutschland Verfahren zur vollstaendigen ausheilung von gitterdefekten in durch ionenimplantation von phosphor erzeugten n-leitenden zonen einer siliciumhalbleitervorrichtung und zugehoerige siliciumhalbleitervorrichtung
US4452645A (en) * 1979-11-13 1984-06-05 International Business Machines Corporation Method of making emitter regions by implantation through a non-monocrystalline layer
US4301588A (en) * 1980-02-01 1981-11-24 International Business Machines Corporation Consumable amorphous or polysilicon emitter process
US4315782A (en) * 1980-07-21 1982-02-16 Rca Corporation Method of making semiconductor device with passivated rectifying junctions having hydrogenated amorphous regions
US4391651A (en) * 1981-10-15 1983-07-05 The United States Of America As Represented By The Secretary Of The Navy Method of forming a hyperabrupt interface in a GaAs substrate
JPS58132922A (ja) * 1982-02-01 1983-08-08 Toshiba Corp 半導体装置の製造方法
US4456489A (en) * 1982-10-15 1984-06-26 Motorola, Inc. Method of forming a shallow and high conductivity boron doped layer in silicon
JPS59204229A (ja) * 1983-05-04 1984-11-19 Sony Corp 半導体装置の製造方法
US4633289A (en) * 1983-09-12 1986-12-30 Hughes Aircraft Company Latch-up immune, multiple retrograde well high density CMOS FET
US4710477A (en) * 1983-09-12 1987-12-01 Hughes Aircraft Company Method for forming latch-up immune, multiple retrograde well high density CMOS FET
US4606443A (en) * 1983-11-30 1986-08-19 Harada Industry Co., Ltd. Planetary drive with overload clutch release means for an antenna
US4617066A (en) * 1984-11-26 1986-10-14 Hughes Aircraft Company Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing
US4775641A (en) * 1986-09-25 1988-10-04 General Electric Company Method of making silicon-on-sapphire semiconductor devices
GB2213988B (en) * 1987-12-18 1992-02-05 Matsushita Electric Works Ltd Semiconductor device
JP3313432B2 (ja) * 1991-12-27 2002-08-12 株式会社東芝 半導体装置及びその製造方法
US5286660A (en) * 1992-12-24 1994-02-15 Motorola, Inc. Method for doping a semiconductor wafer having a diffusivity enhancement region
JP3311210B2 (ja) * 1995-07-28 2002-08-05 株式会社東芝 半導体装置およびその製造方法
JP2848439B2 (ja) * 1995-11-10 1999-01-20 日本電気株式会社 半導体装置の製造方法
US5976956A (en) * 1997-04-11 1999-11-02 Advanced Micro Devices, Inc. Method of controlling dopant concentrations using transient-enhanced diffusion prior to gate formation in a device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3655457A (en) * 1968-08-06 1972-04-11 Ibm Method of making or modifying a pn-junction by ion implantation
US3810791A (en) * 1970-08-03 1974-05-14 Texas Instruments Inc Process for the fabrication of semiconductor materials
US3918996A (en) * 1970-11-02 1975-11-11 Texas Instruments Inc Formation of integrated circuits using proton enhanced diffusion
US3900345A (en) * 1973-08-02 1975-08-19 Motorola Inc Thin low temperature epi regions by conversion of an amorphous layer
FR2241144A1 (en) * 1973-08-14 1975-03-14 Radiotechnique Compelec Semi-conductors for transit time and avalanche diodes - having concentration profiles with steep gradients in opposing directions
US3925106A (en) * 1973-12-26 1975-12-09 Ibm Ion bombardment method of producing integrated semiconductor circuit resistors of low temperature coefficient of resistance
DE2449688C3 (de) * 1974-10-18 1980-07-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper
JPS51123562A (en) * 1975-04-21 1976-10-28 Sony Corp Production method of semiconductor device
US4056408A (en) * 1976-03-17 1977-11-01 Westinghouse Electric Corporation Reducing the switching time of semiconductor devices by nuclear irradiation

Also Published As

Publication number Publication date
JPS531476A (en) 1978-01-09
FR2356277A1 (fr) 1978-01-20
DE2627855A1 (de) 1977-12-29
US4216030A (en) 1980-08-05
FR2356277B1 (it) 1982-05-14
GB1558937A (en) 1980-01-09

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