IT1157228B - Procedimento per il trattamento superficiale getterizzante il lato dorsale di piatrine di semiconduttori - Google Patents

Procedimento per il trattamento superficiale getterizzante il lato dorsale di piatrine di semiconduttori

Info

Publication number
IT1157228B
IT1157228B IT49316/82A IT4931682A IT1157228B IT 1157228 B IT1157228 B IT 1157228B IT 49316/82 A IT49316/82 A IT 49316/82A IT 4931682 A IT4931682 A IT 4931682A IT 1157228 B IT1157228 B IT 1157228B
Authority
IT
Italy
Prior art keywords
getterizing
procedure
surface treatment
semiconductor plates
semiconductor
Prior art date
Application number
IT49316/82A
Other languages
English (en)
Other versions
IT8249316A1 (it
IT8249316A0 (it
Inventor
Alfred Buchner
Franz Kuhn-Kuhnenfeld
Walter Auer
Original Assignee
Wacker Chemitronic
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wacker Chemitronic filed Critical Wacker Chemitronic
Publication of IT8249316A0 publication Critical patent/IT8249316A0/it
Publication of IT8249316A1 publication Critical patent/IT8249316A1/it
Application granted granted Critical
Publication of IT1157228B publication Critical patent/IT1157228B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H10P90/124—Preparing bulk and homogeneous wafers by processing the backside of the wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00—Gettering within semiconductor bodies
    • H10P36/03—Gettering within semiconductor bodies within silicon bodies
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/959—Mechanical polishing of wafer
IT49316/82A 1981-12-10 1982-10-20 Procedimento per il trattamento superficiale getterizzante il lato dorsale di piatrine di semiconduttori IT1157228B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3148957A DE3148957C2 (de) 1981-12-10 1981-12-10 Verfahren zum Herstellen rückseitig oberflächengestörter Halbleiterscheiben

Publications (3)

Publication Number Publication Date
IT8249316A0 IT8249316A0 (it) 1982-10-20
IT8249316A1 IT8249316A1 (it) 1984-04-20
IT1157228B true IT1157228B (it) 1987-02-11

Family

ID=6148400

Family Applications (1)

Application Number Title Priority Date Filing Date
IT49316/82A IT1157228B (it) 1981-12-10 1982-10-20 Procedimento per il trattamento superficiale getterizzante il lato dorsale di piatrine di semiconduttori

Country Status (4)

Country Link
US (1) US4587771A (it)
JP (1) JPS58102529A (it)
DE (1) DE3148957C2 (it)
IT (1) IT1157228B (it)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6064436A (ja) * 1983-09-19 1985-04-13 Fujitsu Ltd スピンドライヤ
DE3738344A1 (de) * 1986-11-14 1988-05-26 Mitsubishi Electric Corp Anlage zum einfuehren von gitterstoerstellen und verfahren dazu
DE3737815A1 (de) * 1987-11-06 1989-05-18 Wacker Chemitronic Siliciumscheiben zur erzeugung von oxidschichten hoher durchschlagsfestigkeit und verfahren zur ihrer herstellung
DE3934140A1 (de) * 1989-10-12 1991-04-18 Wacker Chemitronic Verfahren zur die ausbildung von getterfaehigen zentren induzierenden oberflaechenbehandlung von halbleiterscheiben und dadurch erhaeltliche beidseitig polierte scheiben
JP2610703B2 (ja) * 1990-09-05 1997-05-14 住友電気工業株式会社 半導体素子の製造方法
US5244819A (en) * 1991-10-22 1993-09-14 Honeywell Inc. Method to getter contamination in semiconductor devices
JP2719113B2 (ja) * 1994-05-24 1998-02-25 信越半導体株式会社 単結晶シリコンウェーハの歪付け方法
DE19544328B4 (de) * 1994-11-29 2014-03-20 Ebara Corp. Poliervorrichtung
US5731243A (en) * 1995-09-05 1998-03-24 Taiwan Semiconductor Manufacturing Company, Ltd. Method of cleaning residue on a semiconductor wafer bonding pad
DE19534080A1 (de) * 1995-09-14 1997-03-20 Wacker Siltronic Halbleitermat Verfahren zur Erzeugung einer stapelfehlerinduzierenden Beschädigung auf der Rückseite von Halbleiterscheiben
US5766061A (en) * 1996-10-04 1998-06-16 Eco-Snow Systems, Inc. Wafer cassette cleaning using carbon dioxide jet spray
US5997388A (en) * 1997-08-11 1999-12-07 Micron Electronics, Inc. Apparatus for removing marks from integrated circuit devices
US5938508A (en) * 1997-08-11 1999-08-17 Micron Electronics, Inc. Method for removing marks from integrated circuit devices and devices so processed
US6184064B1 (en) 2000-01-12 2001-02-06 Micron Technology, Inc. Semiconductor die back side surface and method of fabrication
KR20030012332A (ko) * 2001-07-31 2003-02-12 오일광 드럼형 가공휠을 이용한 평면 자동연마장치
US6879050B2 (en) * 2003-02-11 2005-04-12 Micron Technology, Inc. Packaged microelectronic devices and methods for packaging microelectronic devices
US10283595B2 (en) * 2015-04-10 2019-05-07 Panasonic Corporation Silicon carbide semiconductor substrate used to form semiconductor epitaxial layer thereon

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3905162A (en) * 1974-07-23 1975-09-16 Silicon Material Inc Method of preparing high yield semiconductor wafer
DE2537464A1 (de) * 1975-08-22 1977-03-03 Wacker Chemitronic Verfahren zur entfernung spezifischer kristallbaufehler aus halbleiterscheiben
JPS5378170A (en) * 1976-12-22 1978-07-11 Toshiba Corp Continuous processor for gas plasma etching
JPS54110783A (en) * 1978-02-20 1979-08-30 Hitachi Ltd Semiconductor substrate and its manufacture
DE2909470A1 (de) * 1979-03-10 1980-09-11 Walter Krepcke Betonbauelement zur errichtung von winkelstuetzmauern
DE2927220A1 (de) * 1979-07-05 1981-01-15 Wacker Chemitronic Verfahren zur stapelfehlerinduzierenden oberflaechenzerstoerung von halbleiterscheiben

Also Published As

Publication number Publication date
JPS58102529A (ja) 1983-06-18
DE3148957C2 (de) 1987-01-02
IT8249316A1 (it) 1984-04-20
DE3148957A1 (de) 1983-06-23
IT8249316A0 (it) 1982-10-20
US4587771A (en) 1986-05-13

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19931027