IT1213216B - Invertitore logico a porta in tecnica iil perfezionato eprocedimento per la sua fabbricazione. - Google Patents

Invertitore logico a porta in tecnica iil perfezionato eprocedimento per la sua fabbricazione.

Info

Publication number
IT1213216B
IT1213216B IT8422598A IT2259884A IT1213216B IT 1213216 B IT1213216 B IT 1213216B IT 8422598 A IT8422598 A IT 8422598A IT 2259884 A IT2259884 A IT 2259884A IT 1213216 B IT1213216 B IT 1213216B
Authority
IT
Italy
Prior art keywords
perfected
procedure
manufacture
technique
logic inverter
Prior art date
Application number
IT8422598A
Other languages
English (en)
Other versions
IT8422598A0 (it
Inventor
Franco Bertotti
Paolo Ferrari
Luigi Silvestri
Flavio Villa
Original Assignee
Ates Componenti Elettron
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ates Componenti Elettron filed Critical Ates Componenti Elettron
Priority to IT8422598A priority Critical patent/IT1213216B/it
Publication of IT8422598A0 publication Critical patent/IT8422598A0/it
Priority to GB08521341A priority patent/GB2164793B/en
Priority to JP60195693A priority patent/JPS6171660A/ja
Priority to DE19853531506 priority patent/DE3531506A1/de
Priority to FR8513421A priority patent/FR2570222A1/fr
Application granted granted Critical
Publication of IT1213216B publication Critical patent/IT1213216B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0116—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H10D10/461—Inverted vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10D84/652—Integrated injection logic using vertical injector structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/031—Manufacture or treatment of isolation regions comprising PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/30—Isolation regions comprising PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W15/00—Highly-doped buried regions of integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W15/00—Highly-doped buried regions of integrated devices
    • H10W15/01—Manufacture or treatment
IT8422598A 1984-09-10 1984-09-10 Invertitore logico a porta in tecnica iil perfezionato eprocedimento per la sua fabbricazione. IT1213216B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8422598A IT1213216B (it) 1984-09-10 1984-09-10 Invertitore logico a porta in tecnica iil perfezionato eprocedimento per la sua fabbricazione.
GB08521341A GB2164793B (en) 1984-09-10 1985-08-27 Iil logic inverter and method for the manufacture thereof.
JP60195693A JPS6171660A (ja) 1984-09-10 1985-09-04 改善されたｉｉｌロジツクインバータ素子
DE19853531506 DE3531506A1 (de) 1984-09-10 1985-09-04 Logikinverter in iil-technik und verfahren zu dessen herstellung
FR8513421A FR2570222A1 (fr) 1984-09-10 1985-09-10 Inverseur logique 12l ameliore et procede pour le fabriquer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8422598A IT1213216B (it) 1984-09-10 1984-09-10 Invertitore logico a porta in tecnica iil perfezionato eprocedimento per la sua fabbricazione.

Publications (2)

Publication Number Publication Date
IT8422598A0 IT8422598A0 (it) 1984-09-10
IT1213216B true IT1213216B (it) 1989-12-14

Family

ID=11198282

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8422598A IT1213216B (it) 1984-09-10 1984-09-10 Invertitore logico a porta in tecnica iil perfezionato eprocedimento per la sua fabbricazione.

Country Status (5)

Country Link
JP (1) JPS6171660A (it)
DE (1) DE3531506A1 (it)
FR (1) FR2570222A1 (it)
GB (1) GB2164793B (it)
IT (1) IT1213216B (it)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5431872B2 (it) * 1974-09-06 1979-10-09
JPS5837699B2 (ja) * 1974-12-16 1983-08-18 三菱電機株式会社 ハンドウタイキオクソウチ

Also Published As

Publication number Publication date
JPS6171660A (ja) 1986-04-12
GB8521341D0 (en) 1985-10-02
GB2164793B (en) 1988-02-24
IT8422598A0 (it) 1984-09-10
FR2570222A1 (fr) 1986-03-14
GB2164793A (en) 1986-03-26
DE3531506A1 (de) 1986-03-20

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970929