IT1221018B - Dispositivo per verificare celle di memoria in funzione del salto di soglia ottenibile in fase di scrittura - Google Patents

Dispositivo per verificare celle di memoria in funzione del salto di soglia ottenibile in fase di scrittura

Info

Publication number
IT1221018B
IT1221018B IT20127/85A IT2012785A IT1221018B IT 1221018 B IT1221018 B IT 1221018B IT 20127/85 A IT20127/85 A IT 20127/85A IT 2012785 A IT2012785 A IT 2012785A IT 1221018 B IT1221018 B IT 1221018B
Authority
IT
Italy
Prior art keywords
jumping
obtainable
threshold
memory cells
cells according
Prior art date
Application number
IT20127/85A
Other languages
English (en)
Other versions
IT8520127A0 (it
Inventor
Giulio Casagrande
Roberto Gastaldi
Original Assignee
Giulio Casagrande
Roberto Gastaldi
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giulio Casagrande, Roberto Gastaldi filed Critical Giulio Casagrande
Priority to IT20127/85A priority Critical patent/IT1221018B/it
Publication of IT8520127A0 publication Critical patent/IT8520127A0/it
Priority to US06/835,059 priority patent/US4802166A/en
Priority to GB8605387A priority patent/GB2173367B/en
Priority to JP5964586A priority patent/JPH0734320B2/ja
Priority to DE3610071A priority patent/DE3610071C2/de
Priority to FR868604273A priority patent/FR2579817B1/fr
Application granted granted Critical
Publication of IT1221018B publication Critical patent/IT1221018B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
IT20127/85A 1985-03-28 1985-03-28 Dispositivo per verificare celle di memoria in funzione del salto di soglia ottenibile in fase di scrittura IT1221018B (it)

Priority Applications (6)

Application Number Priority Date Filing Date Title
IT20127/85A IT1221018B (it) 1985-03-28 1985-03-28 Dispositivo per verificare celle di memoria in funzione del salto di soglia ottenibile in fase di scrittura
US06/835,059 US4802166A (en) 1985-03-28 1986-02-28 Device for the verification of memory cells on the basis of the threshold drop obtainable during writing
GB8605387A GB2173367B (en) 1985-03-28 1986-03-05 Device for the verification of memory cells on the basis of the threshold drop obtainable during writing
JP5964586A JPH0734320B2 (ja) 1985-03-28 1986-03-19 メモリセル検証装置
DE3610071A DE3610071C2 (de) 1985-03-28 1986-03-25 Einrichtung zum Nachweis des Zustands von Speicherzellen auf der Grundlage eines in der Schreibphase erhaltenen Schwellenwertabfalls
FR868604273A FR2579817B1 (fr) 1985-03-28 1986-03-25 Dispositif pour verifier des cellules de memoire en fonction de l'etat de seuil pouvant etre obtenu en phase d'ecriture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT20127/85A IT1221018B (it) 1985-03-28 1985-03-28 Dispositivo per verificare celle di memoria in funzione del salto di soglia ottenibile in fase di scrittura

Publications (2)

Publication Number Publication Date
IT8520127A0 IT8520127A0 (it) 1985-03-28
IT1221018B true IT1221018B (it) 1990-06-21

Family

ID=11164023

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20127/85A IT1221018B (it) 1985-03-28 1985-03-28 Dispositivo per verificare celle di memoria in funzione del salto di soglia ottenibile in fase di scrittura

Country Status (6)

Country Link
US (1) US4802166A (it)
JP (1) JPH0734320B2 (it)
DE (1) DE3610071C2 (it)
FR (1) FR2579817B1 (it)
GB (1) GB2173367B (it)
IT (1) IT1221018B (it)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62229599A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 不揮発性半導体記憶装置
US4903265A (en) * 1987-11-12 1990-02-20 Motorola, Inc. Method and apparatus for post-packaging testing of one-time programmable memories
IT1221780B (it) * 1988-01-29 1990-07-12 Sgs Thomson Microelectronics Circuito di rilevamento dello stato di celle di matrice in memorie eprom in tecnologia mos
JPH0346197A (ja) * 1989-07-13 1991-02-27 Fujitsu Ltd 半導体記憶装置
GB8916019D0 (en) * 1989-07-13 1989-08-31 Hughes Microelectronics Ltd A non-volatile ram bit cell
FR2665792B1 (fr) * 1990-08-08 1993-06-11 Sgs Thomson Microelectronics Memoire integree pourvue de moyens de test ameliores.
US5142496A (en) * 1991-06-03 1992-08-25 Advanced Micro Devices, Inc. Method for measuring VT 's less than zero without applying negative voltages
FR2694404B1 (fr) * 1992-07-31 1994-09-09 Sgs Thomson Microelectronics Procédé de mesure des tensions de seuil des cellules d'une mémoire intégrée.
DE69631284D1 (de) * 1996-03-29 2004-02-12 St Microelectronics Srl Programmier- und Lese-Verwaltungsarchitektur für Speicheranordnungen, insbesondere für Testzwecke
US6538922B1 (en) 2000-09-27 2003-03-25 Sandisk Corporation Writable tracking cells
US7237074B2 (en) 2003-06-13 2007-06-26 Sandisk Corporation Tracking cells for a memory system
US7301807B2 (en) 2003-10-23 2007-11-27 Sandisk Corporation Writable tracking cells
TWI258768B (en) * 2004-03-10 2006-07-21 Samsung Electronics Co Ltd Sense amplifier and method for generating variable reference level
KR100634169B1 (ko) * 2004-03-10 2006-10-16 삼성전자주식회사 가변형 기준레벨 발생 기능을 가진 센스 앰프 및 그 방법
US20190311749A1 (en) * 2018-04-09 2019-10-10 Anaflash Inc. Logic Compatible Embedded Flash Memory
US12154643B2 (en) 2022-12-20 2024-11-26 Nxp B.V. Non-volatile memory system with secure detection of virgin memory cells

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4223394A (en) * 1979-02-13 1980-09-16 Intel Corporation Sensing amplifier for floating gate memory devices
US4393475A (en) * 1981-01-27 1983-07-12 Texas Instruments Incorporated Non-volatile semiconductor memory and the testing method for the same
JPS5891594A (ja) * 1981-11-27 1983-05-31 Fujitsu Ltd ダイナミツク型半導体記憶装置
US4460985A (en) * 1982-02-19 1984-07-17 International Business Machines Corporation Sense amplifier for MOS static memory array
DE3267750D1 (en) * 1982-03-24 1986-01-16 Itt Ind Gmbh Deutsche Integrated memory matrix with programmable non volatile cells
US4460982A (en) * 1982-05-20 1984-07-17 Intel Corporation Intelligent electrically programmable and electrically erasable ROM
US4612630A (en) * 1984-07-27 1986-09-16 Harris Corporation EEPROM margin testing design
US4670708A (en) * 1984-07-30 1987-06-02 Monolithic Memories, Inc. Short detector for fusible link array using a pair of parallel connected reference fusible links

Also Published As

Publication number Publication date
IT8520127A0 (it) 1985-03-28
US4802166A (en) 1989-01-31
DE3610071A1 (de) 1986-10-02
GB2173367B (en) 1989-06-21
JPH0734320B2 (ja) 1995-04-12
JPS61224200A (ja) 1986-10-04
DE3610071C2 (de) 1995-05-18
FR2579817A1 (fr) 1986-10-03
GB2173367A (en) 1986-10-08
FR2579817B1 (fr) 1993-01-08
GB8605387D0 (en) 1986-04-09

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970329