IT1252623B - Dispositivo a semiconduttore comprendente almeno un transistor di potenza e almeno un circuito di comando, con circuito di isolamento dinamico,integrati in maniera monolitica nella stessa piastrina - Google Patents

Dispositivo a semiconduttore comprendente almeno un transistor di potenza e almeno un circuito di comando, con circuito di isolamento dinamico,integrati in maniera monolitica nella stessa piastrina

Info

Publication number
IT1252623B
IT1252623B ITMI913265A ITMI913265A IT1252623B IT 1252623 B IT1252623 B IT 1252623B IT MI913265 A ITMI913265 A IT MI913265A IT MI913265 A ITMI913265 A IT MI913265A IT 1252623 B IT1252623 B IT 1252623B
Authority
IT
Italy
Prior art keywords
control circuit
potential
power transistor
circuit
integrated
Prior art date
Application number
ITMI913265A
Other languages
English (en)
Inventor
Mario Paparo
Raffaele Zambrano
Original Assignee
Sgs Thomson Microelectronics
Cons Ric Microelettronica
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics, Cons Ric Microelettronica filed Critical Sgs Thomson Microelectronics
Priority to ITMI913265A priority Critical patent/IT1252623B/it
Publication of ITMI913265A0 publication Critical patent/ITMI913265A0/it
Priority to DE69213675T priority patent/DE69213675T2/de
Priority to EP92203677A priority patent/EP0545488B1/en
Priority to JP32551992A priority patent/JP3257842B2/ja
Priority to US07/987,768 priority patent/US5475273A/en
Publication of ITMI913265A1 publication Critical patent/ITMI913265A1/it
Application granted granted Critical
Publication of IT1252623B publication Critical patent/IT1252623B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Nel dispositivo sono presenti un primo, un secondo e un terzo interruttore atti a connettere un nodo della regione di isolamento rispettivamente con un nodo di massa, il collettore o drain del transistor di potenza e una regione di un transistor del circuito di comando. Il circuito di isolamento dinamico del circuito di comando comprende un circuito pilota che comanda:- la chiusura del primo interruttore quando il potenziale del nodo di massa (o della regione di isolamento) è inferiore al potenziale delle regioni di collettore o di drain del transistor di potenza, e al potenziale della predetta regione del circuito di comando;- la chiusura del secondo interruttore e l'apertura del primo quando il potenziale delle regioni di collettore o di drain del transistor di potenza è inferiore al potenziale del nodo di massa (o della regione di isolamento);- la chiusura del terzo interruttore e l'apertura del primo quando il potenziale della predetta regione del circuito di comando è inferiore al potenziale del nodo di massa (o della regione di isolamento).
ITMI913265A 1991-12-05 1991-12-05 Dispositivo a semiconduttore comprendente almeno un transistor di potenza e almeno un circuito di comando, con circuito di isolamento dinamico,integrati in maniera monolitica nella stessa piastrina IT1252623B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
ITMI913265A IT1252623B (it) 1991-12-05 1991-12-05 Dispositivo a semiconduttore comprendente almeno un transistor di potenza e almeno un circuito di comando, con circuito di isolamento dinamico,integrati in maniera monolitica nella stessa piastrina
DE69213675T DE69213675T2 (de) 1991-12-05 1992-11-27 Halbleiteranordnung bestehend aus mindestens einem Leistungstransistor und zu mindest einer Steuerschaltung die auf demselben Chip zusammen mit einer dynamischen Isolierschaltung monolitisch integriert ist
EP92203677A EP0545488B1 (en) 1991-12-05 1992-11-27 Semiconductor device comprising at least one power transistor and at least one control circuit with dynamic insulation circuit integrated monolithically in the same chip
JP32551992A JP3257842B2 (ja) 1991-12-05 1992-12-04 ダイナミック絶縁回路を設けた半導体電子デバイス
US07/987,768 US5475273A (en) 1991-12-05 1992-12-07 Smart power integrated circuit with dynamic isolation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI913265A IT1252623B (it) 1991-12-05 1991-12-05 Dispositivo a semiconduttore comprendente almeno un transistor di potenza e almeno un circuito di comando, con circuito di isolamento dinamico,integrati in maniera monolitica nella stessa piastrina

Publications (3)

Publication Number Publication Date
ITMI913265A0 ITMI913265A0 (it) 1991-12-05
ITMI913265A1 ITMI913265A1 (it) 1993-06-05
IT1252623B true IT1252623B (it) 1995-06-19

Family

ID=11361267

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI913265A IT1252623B (it) 1991-12-05 1991-12-05 Dispositivo a semiconduttore comprendente almeno un transistor di potenza e almeno un circuito di comando, con circuito di isolamento dinamico,integrati in maniera monolitica nella stessa piastrina

Country Status (5)

Country Link
US (1) US5475273A (it)
EP (1) EP0545488B1 (it)
JP (1) JP3257842B2 (it)
DE (1) DE69213675T2 (it)
IT (1) IT1252623B (it)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1261880B (it) * 1992-02-17 1996-06-03 St Microelectronics Srl Dispositivo di isolamento del substrato, particolarmente per circuiti integrati
US5631177A (en) * 1992-12-07 1997-05-20 Sgs-Thomson Microelectronics, S.R.L. Process for manufacturing integrated circuit with power field effect transistors
EP0703620B1 (en) * 1994-09-21 2001-01-10 STMicroelectronics S.r.l. Circuit for preventing turn-on of parasitic components in integrated circuits including a power stage and low-voltage control circuitry
US5627487A (en) * 1995-06-28 1997-05-06 Micron Technology, Inc. Charge conserving driver circuit for capacitive loads
JP3036423B2 (ja) * 1996-02-06 2000-04-24 日本電気株式会社 半導体装置
DE69624493T2 (de) * 1996-12-09 2003-06-26 Stmicroelectronics S.R.L., Agrate Brianza Vorrichtung und Verfahren zur Unterdrückung von parasitären Effekten in einer integrierten Schaltung mit pn-Isolationszonen
US6057718A (en) * 1997-02-26 2000-05-02 Micron Technology, Inc. Method and apparatus for a charge conserving driver circuit for capacitive loads
WO1999022409A2 (en) * 1997-10-28 1999-05-06 Koninklijke Philips Electronics N.V. Semiconductor device comprising a half-bridge circuit
EP1045501A3 (en) * 1999-04-14 2003-02-12 GATE S.p.A. A piloting circuit for an inductive load, in particular for a dc electric motor
EP1221718A1 (en) 2001-01-08 2002-07-10 STMicroelectronics S.r.l. Integrated power device with improved efficiency and reduced overall dimensions
JP2002324846A (ja) * 2001-04-25 2002-11-08 Sanken Electric Co Ltd 半導体装置及びその製造方法
US6573562B2 (en) * 2001-10-31 2003-06-03 Motorola, Inc. Semiconductor component and method of operation
JP2004247400A (ja) * 2003-02-12 2004-09-02 Renesas Technology Corp 半導体装置
JP2006311507A (ja) * 2005-03-28 2006-11-09 Matsushita Electric Ind Co Ltd 電源スイッチ回路
US8168466B2 (en) * 2007-06-01 2012-05-01 Semiconductor Components Industries, Llc Schottky diode and method therefor
DE102009049671B4 (de) * 2009-10-16 2020-02-27 Infineon Technologies Ag Integrierte Schaltung mit ESD Struktur
FR3083919A1 (fr) * 2018-07-13 2020-01-17 Stmicroelectronics (Rousset) Sas Puce electronique protegee
CN115236503B (zh) * 2022-07-27 2024-08-09 西安交通大学 一种用于开关工频耐压动态绝缘测试的回路及方法

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US3931634A (en) * 1973-06-14 1976-01-06 Rca Corporation Junction-isolated monolithic integrated circuit device with means for preventing parasitic transistor action
US4336466A (en) * 1980-06-30 1982-06-22 Inmos Corporation Substrate bias generator
US4426658A (en) * 1980-12-29 1984-01-17 Sprague Electric Company IC With protection against reversed power supply
US4496849A (en) * 1982-02-22 1985-01-29 General Motors Corporation Power transistor protection from substrate injection
JPS6164138A (ja) * 1984-09-06 1986-04-02 Nec Corp モノリシツク集積回路
JPS61101068A (ja) * 1984-10-24 1986-05-19 Nec Corp 半導体集積回路
JPS61180472A (ja) * 1985-02-05 1986-08-13 Mitsubishi Electric Corp 半導体装置
US4972247A (en) * 1985-10-28 1990-11-20 Silicon Systems, Inc. High energy event protection for semiconductor devices
US4675561A (en) * 1985-11-15 1987-06-23 Precision Monolithics, Inc. FET output drive circuit with parasitic transistor inhibition
IT1197279B (it) * 1986-09-25 1988-11-30 Sgs Microelettronica Spa Dispositivo integrato per schermare l'iniezione di cariche nel substrato, in particolare in circuiti di pilotaggio di carichi induttivi e/o capacitivi
JPH0691194B2 (ja) * 1986-12-19 1994-11-14 ロ−ム株式会社 半導体集積回路の寄生効果防止方法
US4789917A (en) * 1987-08-31 1988-12-06 National Semiconductor Corp. MOS I/O protection using switched body circuit design
JPH07120746B2 (ja) * 1987-09-18 1995-12-20 富士電機株式会社 半導体集積回路装置
JP2623692B2 (ja) * 1988-01-22 1997-06-25 ソニー株式会社 半導体回路装置
FR2628890B1 (fr) * 1988-03-16 1990-08-24 Bendix Electronics Sa Dispositif de commande de l'alimentation electrique d'une charge en circuit integre de puissance " intelligent "
US5051612A (en) * 1989-02-10 1991-09-24 Texas Instruments Incorporated Prevention of parasitic mechanisms in junction isolated devices
IT1231541B (it) * 1989-07-25 1991-12-17 Sgs Thomson Microelectronics Dispositivo di protezione contro gli effetti parassiti provocati da impulsi negativi di tensione di alimentazione in circuiti integrati monolitici includenti un dispositivo di potenza per il pilotaggio di un carico induttivo ed un dispositivo di controllo per detto dispositivo di potenza.
FR2655196B1 (fr) * 1989-11-29 1992-04-10 Sgs Thomson Microelectronics Circuit d'isolation dynamique de circuits integres.

Also Published As

Publication number Publication date
EP0545488B1 (en) 1996-09-11
ITMI913265A1 (it) 1993-06-05
JPH06132538A (ja) 1994-05-13
DE69213675T2 (de) 1997-02-27
US5475273A (en) 1995-12-12
DE69213675D1 (de) 1996-10-17
EP0545488A1 (en) 1993-06-09
ITMI913265A0 (it) 1991-12-05
JP3257842B2 (ja) 2002-02-18

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227