IT1258284B - Struttura di interconnessione di un dispositivo a circuito integrato asemicondutture e suo prcedimento di fabbricazione - Google Patents

Struttura di interconnessione di un dispositivo a circuito integrato asemicondutture e suo prcedimento di fabbricazione

Info

Publication number
IT1258284B
IT1258284B ITMI920845A ITMI920845A IT1258284B IT 1258284 B IT1258284 B IT 1258284B IT MI920845 A ITMI920845 A IT MI920845A IT MI920845 A ITMI920845 A IT MI920845A IT 1258284 B IT1258284 B IT 1258284B
Authority
IT
Italy
Prior art keywords
asemiconductures
integrated circuit
manufacturing process
circuit device
interconnection structure
Prior art date
Application number
ITMI920845A
Other languages
English (en)
Inventor
Shigeru Harada
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of ITMI920845A0 publication Critical patent/ITMI920845A0/it
Publication of ITMI920845A1 publication Critical patent/ITMI920845A1/it
Application granted granted Critical
Publication of IT1258284B publication Critical patent/IT1258284B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/047—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein
    • H10W20/049—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein by diffusing alloying elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/083—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being via holes penetrating underlying conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Professional, Industrial, Or Sporting Protective Garments (AREA)

Abstract

Un copriletto ad elevata adattabilità posizionabile al disopra di un letto provvisto di relativi cuscini, il quale viene realizzato in almeno un pezzo di tessuto elastico e/o non elastico e comprende essenzialmente una prima parte principale di copertura diretta del letto ed una seconda parte minore di copertura dei cuscini, la prima parte principale lungo suoi bordi longitudinali essendo dotata di plissettature o pieghettature atte ad attestarsi lungo spigoli longitudinali del letto.
ITMI920845A 1991-04-09 1992-04-07 Struttura di interconnessione di un dispositivo a circuito integrato asemicondutture e suo prcedimento di fabbricazione IT1258284B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3076544A JP2533414B2 (ja) 1991-04-09 1991-04-09 半導体集積回路装置の配線接続構造およびその製造方法

Publications (3)

Publication Number Publication Date
ITMI920845A0 ITMI920845A0 (it) 1992-04-07
ITMI920845A1 ITMI920845A1 (it) 1993-10-07
IT1258284B true IT1258284B (it) 1996-02-22

Family

ID=13608211

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI920845A IT1258284B (it) 1991-04-09 1992-04-07 Struttura di interconnessione di un dispositivo a circuito integrato asemicondutture e suo prcedimento di fabbricazione

Country Status (5)

Country Link
US (2) US5341026A (it)
JP (1) JP2533414B2 (it)
KR (1) KR960009099B1 (it)
DE (1) DE4207916C2 (it)
IT (1) IT1258284B (it)

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JP2663887B2 (ja) * 1994-11-29 1997-10-15 日本電気株式会社 不揮発性半導体記憶装置
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US6288438B1 (en) 1996-09-06 2001-09-11 Sanyo Electric Co., Ltd. Semiconductor device including insulation film and fabrication method thereof
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US6537905B1 (en) 1996-12-30 2003-03-25 Applied Materials, Inc. Fully planarized dual damascene metallization using copper line interconnect and selective CVD aluminum plug
US6139697A (en) * 1997-01-31 2000-10-31 Applied Materials, Inc. Low temperature integrated via and trench fill process and apparatus
US5844318A (en) 1997-02-18 1998-12-01 Micron Technology, Inc. Aluminum film for semiconductive devices
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US6139905A (en) * 1997-04-11 2000-10-31 Applied Materials, Inc. Integrated CVD/PVD Al planarization using ultra-thin nucleation layers
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JP3179065B2 (ja) * 1999-02-02 2001-06-25 宮崎沖電気株式会社 半導体素子の製造方法
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JP2003068848A (ja) * 2001-08-29 2003-03-07 Fujitsu Ltd 半導体装置及びその製造方法
US6917110B2 (en) * 2001-12-07 2005-07-12 Sanyo Electric Co., Ltd. Semiconductor device comprising an interconnect structure with a modified low dielectric insulation layer
US6797620B2 (en) * 2002-04-16 2004-09-28 Applied Materials, Inc. Method and apparatus for improved electroplating fill of an aperture
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Also Published As

Publication number Publication date
JPH04311058A (ja) 1992-11-02
DE4207916A1 (de) 1992-10-15
KR920020620A (ko) 1992-11-21
JP2533414B2 (ja) 1996-09-11
ITMI920845A0 (it) 1992-04-07
ITMI920845A1 (it) 1993-10-07
US5341026A (en) 1994-08-23
KR960009099B1 (ko) 1996-07-10
US5480836A (en) 1996-01-02
DE4207916C2 (de) 1994-06-30

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Legal Events

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0001 Granted
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Effective date: 19970429