IT1261074B - Metodo e dispositivo di collaudo per schede elettroniche - Google Patents
Metodo e dispositivo di collaudo per schede elettronicheInfo
- Publication number
- IT1261074B IT1261074B ITTO930486A ITTO930486A IT1261074B IT 1261074 B IT1261074 B IT 1261074B IT TO930486 A ITTO930486 A IT TO930486A IT TO930486 A ITTO930486 A IT TO930486A IT 1261074 B IT1261074 B IT 1261074B
- Authority
- IT
- Italy
- Prior art keywords
- testing device
- casing
- electronic boards
- pin
- integrated circuit
- Prior art date
Links
- 230000005684 electric field Effects 0.000 abstract 2
- 238000010998 test method Methods 0.000 abstract 1
- 238000003466 welding Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/302—Contactless testing
- G01R31/312—Contactless testing by capacitive methods
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/66—Testing of connections, e.g. of plugs or non-disconnectable joints
- G01R31/70—Testing of connections between components and printed circuit boards
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
Metodo di collaudo in cui viene alimentato un segnale elettrico impulsivo ad un piedino (16) di un circuito integrato (8) portato da una scheda elettronica (6) e viene rivelato, mediante un elettrodo (27) affacciato all'involucro (11) del circuito integrato (8), il campo elettrico (E) prodotto all'interno dell'involucro (11) da tale segnale impulsivo. in caso di interruzione elettrica del piedino (16) o del filo di saldatura (18) il campo elettrico rilevato (E) è molto piccolo e viene generata una segnalazione di difetto di connessione.[Figura 1].
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| ITTO930486A IT1261074B (it) | 1993-07-05 | 1993-07-05 | Metodo e dispositivo di collaudo per schede elettroniche |
| EP94110382A EP0633478A3 (en) | 1993-07-05 | 1994-07-04 | Method and device for testing electronic circuit boards. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| ITTO930486A IT1261074B (it) | 1993-07-05 | 1993-07-05 | Metodo e dispositivo di collaudo per schede elettroniche |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| ITTO930486A0 ITTO930486A0 (it) | 1993-07-05 |
| ITTO930486A1 ITTO930486A1 (it) | 1995-01-05 |
| IT1261074B true IT1261074B (it) | 1996-05-08 |
Family
ID=11411600
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ITTO930486A IT1261074B (it) | 1993-07-05 | 1993-07-05 | Metodo e dispositivo di collaudo per schede elettroniche |
Country Status (2)
| Country | Link |
|---|---|
| EP (1) | EP0633478A3 (it) |
| IT (1) | IT1261074B (it) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5755985A (en) * | 1994-09-06 | 1998-05-26 | Hydro-Quebec | LPB electrolyte compositions based on mixtures of copolymers and interpenetrated networks |
| JP3080595B2 (ja) * | 1997-02-28 | 2000-08-28 | 日本電産リード株式会社 | 基板検査装置および基板検査方法 |
| JP3165056B2 (ja) * | 1997-02-28 | 2001-05-14 | 日本電産リード株式会社 | 基板検査装置および基板検査方法 |
| DE19742055C2 (de) * | 1997-09-24 | 2000-02-24 | Ita Ingb Testaufgaben Gmbh | Vorrichtung zum Testen von Schaltungsplatinen |
| DE102007011817B4 (de) * | 2007-03-12 | 2018-09-20 | Rohde & Schwarz Gmbh & Co. Kg | Verfahren und Vorrichtung zum Lokalisieren von Fehlern auf elektronischen Leiterplatten mit kapazitivem Sensor |
| DE102007029126B4 (de) * | 2007-06-25 | 2018-09-20 | Rohde & Schwarz Gmbh & Co. Kg | Sensor zum Lokalisieren von Fehlern auf elektronischen Leiterplatten mit nur einer Signalleitung |
| US9250293B2 (en) | 2012-07-09 | 2016-02-02 | Infineon Technologies Ag | Capacitive test device and method for capacitive testing a component |
| DE102016114142A1 (de) | 2016-08-01 | 2018-02-01 | Endress+Hauser Flowtec Ag | Leiterplatte mit Kontaktierungsanordnung |
| DE102016114144A1 (de) | 2016-08-01 | 2018-02-01 | Endress+Hauser Flowtec Ag | Testsystem zur Prüfung von elektrischen Verbindungen von Bauteilen mit einer Leiterplatte |
| DE102016114145A1 (de) | 2016-08-01 | 2018-02-01 | Endress+Hauser Flowtec Ag | Testsystem zur Überprüfung von elektrischen Verbindungen von elektronischen Bauteilen mit einer Leiterplatte |
| DE102016114146A1 (de) | 2016-08-01 | 2018-02-01 | Endress+Hauser Flowtec Ag | Testsystem zur Überprüfung von elektronischen Verbindungen |
| DE102016114143A1 (de) | 2016-08-01 | 2018-02-01 | Endress+Hauser Flowtec Ag | Testsystem zur Überprüfung von elektronischen Verbindungen von Bauteilen mit einer Leiterplatte und Leiterplatte |
| KR20190092737A (ko) * | 2018-01-31 | 2019-08-08 | 삼성전자주식회사 | 전기적 컴포넌트가 장착된 커넥터의 에러 발생을 감지할 수 있는 전자 장치 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5138266A (en) * | 1989-10-20 | 1992-08-11 | Digital Equipment Corporation | Single-probe charge measurement testing method |
| US5124660A (en) * | 1990-12-20 | 1992-06-23 | Hewlett-Packard Company | Identification of pin-open faults by capacitive coupling through the integrated circuit package |
-
1993
- 1993-07-05 IT ITTO930486A patent/IT1261074B/it active IP Right Grant
-
1994
- 1994-07-04 EP EP94110382A patent/EP0633478A3/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| EP0633478A2 (en) | 1995-01-11 |
| ITTO930486A1 (it) | 1995-01-05 |
| ITTO930486A0 (it) | 1993-07-05 |
| EP0633478A3 (en) | 1995-05-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 0001 | Granted | ||
| TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970729 |