IT8021514A0 - Metodo di fabbricazione di un transistore ad effetto di campo, aporta isolata e transistore fabbricato con l'ausilio di tale metodo. - Google Patents

Metodo di fabbricazione di un transistore ad effetto di campo, aporta isolata e transistore fabbricato con l'ausilio di tale metodo.

Info

Publication number
IT8021514A0
IT8021514A0 IT8021514A IT2151480A IT8021514A0 IT 8021514 A0 IT8021514 A0 IT 8021514A0 IT 8021514 A IT8021514 A IT 8021514A IT 2151480 A IT2151480 A IT 2151480A IT 8021514 A0 IT8021514 A0 IT 8021514A0
Authority
IT
Italy
Prior art keywords
aid
manufacture
transistor
field effect
isolated port
Prior art date
Application number
IT8021514A
Other languages
English (en)
Other versions
IT1140878B (it
Inventor
Jochems Pieter
Wilhelmus Johannes
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of IT8021514A0 publication Critical patent/IT8021514A0/it
Application granted granted Critical
Publication of IT1140878B publication Critical patent/IT1140878B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching
IT21514/80A 1979-04-23 1980-04-18 Metodo di fabricazione di un transistore ad effetto di campo, a porta isolata e transistore fabbricato con l'ausilio di tale metodo IT1140878B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7903158A NL7903158A (nl) 1979-04-23 1979-04-23 Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.

Publications (2)

Publication Number Publication Date
IT8021514A0 true IT8021514A0 (it) 1980-04-18
IT1140878B IT1140878B (it) 1986-10-10

Family

ID=19833027

Family Applications (1)

Application Number Title Priority Date Filing Date
IT21514/80A IT1140878B (it) 1979-04-23 1980-04-18 Metodo di fabricazione di un transistore ad effetto di campo, a porta isolata e transistore fabbricato con l'ausilio di tale metodo

Country Status (10)

Country Link
US (1) US4343079A (it)
JP (1) JPS55141758A (it)
AU (1) AU537858B2 (it)
CA (1) CA1146675A (it)
CH (1) CH653482A5 (it)
DE (1) DE3015101A1 (it)
FR (1) FR2455361A1 (it)
GB (1) GB2047961B (it)
IT (1) IT1140878B (it)
NL (1) NL7903158A (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5252505A (en) * 1979-05-25 1993-10-12 Hitachi, Ltd. Method for manufacturing a semiconductor device
JPS55156370A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Manufacture of semiconductor device
JPS60106142A (ja) * 1983-11-15 1985-06-11 Nec Corp 半導体素子の製造方法
US4675982A (en) * 1985-10-31 1987-06-30 International Business Machines Corporation Method of making self-aligned recessed oxide isolation regions
EP0585601B1 (en) 1992-07-31 1999-04-28 Hughes Electronics Corporation Integrated circuit security system and method with implanted interconnections
US5973375A (en) * 1997-06-06 1999-10-26 Hughes Electronics Corporation Camouflaged circuit structure with step implants

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3698966A (en) * 1970-02-26 1972-10-17 North American Rockwell Processes using a masking layer for producing field effect devices having oxide isolation
NL164424C (nl) * 1970-06-04 1980-12-15 Philips Nv Werkwijze voor het vervaardigen van een veldeffect- transistor met een geisoleerde stuurelektrode, waarbij een door een tegen oxydatie maskerende laag vrijgelaten deel van het oppervlak van een siliciumlichaam aan een oxydatiebehandeling wordt onderworpen ter verkrijging van een althans gedeeltelijk in het siliciumlichaam verzonken siliciumoxydelaag.
NL173110C (nl) * 1971-03-17 1983-12-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.
JPS5528229B1 (it) * 1971-03-19 1980-07-26
FR2134290B1 (it) * 1971-04-30 1977-03-18 Texas Instruments France
NL7113561A (it) * 1971-10-02 1973-04-04
US4023195A (en) * 1974-10-23 1977-05-10 Smc Microsystems Corporation MOS field-effect transistor structure with mesa-like contact and gate areas and selectively deeper junctions
US4013484A (en) * 1976-02-25 1977-03-22 Intel Corporation High density CMOS process
JPS52131483A (en) * 1976-04-28 1977-11-04 Hitachi Ltd Mis-type semiconductor device
NL185376C (nl) * 1976-10-25 1990-03-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
JPS53123661A (en) * 1977-04-04 1978-10-28 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS53123678A (en) * 1977-04-04 1978-10-28 Nec Corp Manufacture of field effect semiconductor device of insulation gate type
JPS53144280A (en) * 1977-05-23 1978-12-15 Hitachi Ltd Mis semiconductor device
US4268950A (en) * 1978-06-05 1981-05-26 Texas Instruments Incorporated Post-metal ion implant programmable MOS read only memory
US4168999A (en) * 1978-12-26 1979-09-25 Fairchild Camera And Instrument Corporation Method for forming oxide isolated integrated injection logic semiconductor structures having minimal encroachment utilizing special masking techniques

Also Published As

Publication number Publication date
DE3015101C2 (it) 1990-03-29
DE3015101A1 (de) 1980-11-06
AU5765180A (en) 1980-10-30
GB2047961B (en) 1983-08-03
NL7903158A (nl) 1980-10-27
US4343079A (en) 1982-08-10
AU537858B2 (en) 1984-07-19
GB2047961A (en) 1980-12-03
FR2455361B1 (it) 1983-04-29
CH653482A5 (de) 1985-12-31
JPS55141758A (en) 1980-11-05
CA1146675A (en) 1983-05-17
FR2455361A1 (fr) 1980-11-21
IT1140878B (it) 1986-10-10

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