IT8421504A0 - Circuito per minimizzare le pertubazioni della frequenza d'orologio locale nella sincronizzazione di fase con un circuito d'orologio di riferimento. - Google Patents

Circuito per minimizzare le pertubazioni della frequenza d'orologio locale nella sincronizzazione di fase con un circuito d'orologio di riferimento.

Info

Publication number
IT8421504A0
IT8421504A0 IT8421504A IT2150484A IT8421504A0 IT 8421504 A0 IT8421504 A0 IT 8421504A0 IT 8421504 A IT8421504 A IT 8421504A IT 2150484 A IT2150484 A IT 2150484A IT 8421504 A0 IT8421504 A0 IT 8421504A0
Authority
IT
Italy
Prior art keywords
circuit
phase synchronization
minimize disturbances
reference clock
clock frequency
Prior art date
Application number
IT8421504A
Other languages
English (en)
Other versions
IT1175523B (it
Inventor
Ivan L Edwards
Robert C Mc Laughlin
Max S Macrander
Original Assignee
Gte Communication Syst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gte Communication Syst filed Critical Gte Communication Syst
Publication of IT8421504A0 publication Critical patent/IT8421504A0/it
Application granted granted Critical
Publication of IT1175523B publication Critical patent/IT1175523B/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
IT21504/84A 1983-06-23 1984-06-20 Circuito per minimizzare le pertubazioni della frequenza d'orologio locale nella sincronizzazione di fase con un circuito d'orologio di riferimento IT1175523B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/507,437 US4498059A (en) 1983-06-23 1983-06-23 Circuit to minimize local clock frequency disturbances when phase locking to a reference clock circuit

Publications (2)

Publication Number Publication Date
IT8421504A0 true IT8421504A0 (it) 1984-06-20
IT1175523B IT1175523B (it) 1987-07-01

Family

ID=24018644

Family Applications (1)

Application Number Title Priority Date Filing Date
IT21504/84A IT1175523B (it) 1983-06-23 1984-06-20 Circuito per minimizzare le pertubazioni della frequenza d'orologio locale nella sincronizzazione di fase con un circuito d'orologio di riferimento

Country Status (4)

Country Link
US (1) US4498059A (it)
BE (1) BE899991A (it)
CA (1) CA1215143A (it)
IT (1) IT1175523B (it)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2541533B1 (fr) * 1983-02-21 1987-10-30 Nippon Telegraph & Telephone Oscillateur variable en phase et en frequence
US4849993A (en) * 1987-12-10 1989-07-18 Silicon General, Inc. Clock holdover circuit
US5574406A (en) * 1993-04-20 1996-11-12 Rca Thomson Licensing Corporation Phase lock loop with error measurement and correction in alternate periods
JP3834058B2 (ja) * 1993-04-20 2006-10-18 アールシーエー トムソン ライセンシング コーポレイシヨン 同期信号に位相ロックされた出力信号を発生する装置
US5483201A (en) * 1993-09-30 1996-01-09 At&T Corp. Synchronization circuit using a high speed digital slip counter
KR0177731B1 (ko) * 1994-09-15 1999-05-15 정장호 망동기용 디지탈 위상동기루프 제어방법
US5612980A (en) * 1995-03-22 1997-03-18 Alcatel Network Systems, Inc. Method and apparatus for fast lock time
KR100281972B1 (ko) * 1997-12-23 2001-02-15 김진찬 고정도디지털처리위상동기루프장치및방법
RU2199178C1 (ru) * 2001-06-19 2003-02-20 Розенберг Ефим Наумович Способ тактовой сетевой синхронизации генераторов
US7720451B2 (en) * 2004-12-03 2010-05-18 Itt Manufacturing Enterprises, Inc. Methods and apparatus for calibrating oscillators in a receiver

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4151485A (en) * 1977-11-21 1979-04-24 Rockwell International Corporation Digital clock recovery circuit
US4305045A (en) * 1979-11-14 1981-12-08 Bell Telephone Laboratories, Incorporated Phase locked loop clock synchronizing circuit with programmable controller
DE3025358A1 (de) * 1980-07-04 1982-01-21 Deutsche Itt Industries Gmbh, 7800 Freiburg Regelsystem zum einstellen einer physikalischen groesse

Also Published As

Publication number Publication date
CA1215143A (en) 1986-12-09
US4498059A (en) 1985-02-05
BE899991A (fr) 1984-10-15
IT1175523B (it) 1987-07-01

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