IT8620132A1 - Circuito di polarizzazione per dispositivi integrati in tecnologia mos, particolarmente di tipo misto digitale-analogico - Google Patents

Circuito di polarizzazione per dispositivi integrati in tecnologia mos, particolarmente di tipo misto digitale-analogico

Info

Publication number: IT8620132A1
Authority: IT; Italy
Prior art keywords: integrated devices; analog type; mos technology; mixed digital; polarization circuit
Prior art date: 1986-04-18

Application number

IT1986A20132A

Other languages

English (en)

Other versions

IT1190325B (it

IT8620132A0 (it

Original Assignee

Sgs Microelettronica Spa

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1986-04-18

Filing date

1986-04-18

Publication date

1987-10-18

1986-04-18 Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa

1986-04-18 Priority to IT20132/86A priority Critical patent/IT1190325B/it

1986-04-18 Publication of IT8620132A0 publication Critical patent/IT8620132A0/it

1987-04-15 Priority to US07/038,745 priority patent/US4780624A/en

1987-04-16 Priority to DE3713107A priority patent/DE3713107C2/de

1987-10-18 Publication of IT8620132A1 publication Critical patent/IT8620132A1/it

1988-02-16 Application granted granted Critical

1988-02-16 Publication of IT1190325B publication Critical patent/IT1190325B/it

Links

230000010287 polarization Effects 0.000 title 1

Classifications

- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/267—Current mirrors using both bipolar and field-effect technology

Landscapes

Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
Microelectronics & Electronic Packaging (AREA)
Nonlinear Science (AREA)
Electromagnetism (AREA)
General Physics & Mathematics (AREA)
Radar, Positioning & Navigation (AREA)
Automation & Control Theory (AREA)
Amplifiers (AREA)

IT20132/86A 1986-04-18 1986-04-18 Circuito di polarizzazione per dispositivi integrati in tecnologia mos,particolarmente di tipo misto digitale-analogico IT1190325B (it)

Priority Applications (3)

Application Number	Priority Date	Filing Date	Title
IT20132/86A IT1190325B (it)	1986-04-18	1986-04-18	Circuito di polarizzazione per dispositivi integrati in tecnologia mos,particolarmente di tipo misto digitale-analogico
US07/038,745 US4780624A (en)	1986-04-18	1987-04-15	BiMOS biasing circuit
DE3713107A DE3713107C2 (de)	1986-04-18	1987-04-16	Schaltung zur Erzeugung von konstanten Spannungen in CMOS-Technologie

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
IT20132/86A IT1190325B (it)	1986-04-18	1986-04-18	Circuito di polarizzazione per dispositivi integrati in tecnologia mos,particolarmente di tipo misto digitale-analogico

Publications (3)

Publication Number	Publication Date
IT8620132A0 IT8620132A0 (it)	1986-04-18
IT8620132A1 true IT8620132A1 (it)	1987-10-18
IT1190325B IT1190325B (it)	1988-02-16

Family

ID=11164072

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
IT20132/86A IT1190325B (it)	1986-04-18	1986-04-18	Circuito di polarizzazione per dispositivi integrati in tecnologia mos,particolarmente di tipo misto digitale-analogico

Country Status (3)

Country	Link
US (1)	US4780624A (it)
DE (1)	DE3713107C2 (it)
IT (1)	IT1190325B (it)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4906863A (en) *	1988-02-29	1990-03-06	Texas Instruments Incorporated	Wide range power supply BiCMOS band-gap reference voltage circuit
US4902915A (en) *	1988-05-25	1990-02-20	Texas Instruments Incorporated	BICMOS TTL input buffer
US5136179A (en) *	1988-10-31	1992-08-04	Teledyne Industries, Inc.	Logic level discriminator
US4935690A (en) *	1988-10-31	1990-06-19	Teledyne Industries, Inc.	CMOS compatible bandgap voltage reference
JPH0727424B2 (ja) *	1988-12-09	1995-03-29	富士通株式会社	定電流源回路
US5001362A (en) *	1989-02-14	1991-03-19	Texas Instruments Incorporated	BiCMOS reference network
US4943737A (en) *	1989-10-13	1990-07-24	Advanced Micro Devices, Inc.	BICMOS regulator which controls MOS transistor current
US5034626A (en) *	1990-09-17	1991-07-23	Motorola, Inc.	BIMOS current bias with low temperature coefficient
US5120994A (en) *	1990-12-17	1992-06-09	Hewlett-Packard Company	Bicmos voltage generator
US5187395A (en) *	1991-01-04	1993-02-16	Motorola, Inc.	BIMOS voltage bias with low temperature coefficient
GB2264573B (en) *	1992-02-05	1996-08-21	Nec Corp	Reference voltage generating circuit
US5410275A (en) *	1993-12-13	1995-04-25	Motorola Inc.	Amplifier circuit suitable for use in a radiotelephone
FR2744262B1 (fr) *	1996-01-31	1998-02-27	Sgs Thomson Microelectronics	Dispositif de reference de courant en circuit integre
FR2744263B3 (fr) *	1996-01-31	1998-03-27	Sgs Thomson Microelectronics	Dispositif de reference de courant en circuit integre
DE19752423C1 (de) *	1997-11-26	1999-08-12	Siemens Ag	Schaltungsanordnung zur Erzeugung eines elektrischen Bezugspotentiales
US6175267B1 (en) *	1999-02-04	2001-01-16	Microchip Technology Incorporated	Current compensating bias generator and method therefor
JP3450257B2 (ja) *	2000-02-28	2003-09-22	Ｎｅｃ化合物デバイス株式会社	アクティブ・バイアス回路
DE10014385B4 (de)	2000-03-23	2005-12-15	Infineon Technologies Ag	CMOS-Spannungsteiler
US6853164B1 (en) *	2002-04-30	2005-02-08	Fairchild Semiconductor Corporation	Bandgap reference circuit
KR100492095B1 (ko) *	2003-02-24	2005-06-02	삼성전자주식회사	스타트업 회로를 갖는 바이어스회로
US7394308B1 (en) *	2003-03-07	2008-07-01	Cypress Semiconductor Corp.	Circuit and method for implementing a low supply voltage current reference
US10127150B2 (en)	2012-11-09	2018-11-13	Sandisk Technologies Llc	Key value addressed storage drive using NAND flash based content addressable memory
US9075424B2 (en) *	2013-03-06	2015-07-07	Sandisk Technologies Inc.	Compensation scheme to improve the stability of the operational amplifiers

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4558242A (en) *	1983-02-11	1985-12-10	Analog Devices, Incorporated	Extended reference range, voltage-mode CMOS D/A converter
JPS6157118A (ja) *	1984-08-29	1986-03-24	Toshiba Corp	レベル変換回路
IT1179823B (it) *	1984-11-22	1987-09-16	Cselt Centro Studi Lab Telecom	Generatore di tensione differenziale di rifferimento per circuiti integrati ad alimentazione singola in tecnologia nmos

1986
- 1986-04-18 IT IT20132/86A patent/IT1190325B/it active
1987
- 1987-04-15 US US07/038,745 patent/US4780624A/en not_active Expired - Lifetime
- 1987-04-16 DE DE3713107A patent/DE3713107C2/de not_active Expired - Fee Related

Also Published As

Publication number	Publication date
IT1190325B (it)	1988-02-16
DE3713107C2 (de)	1995-08-10
IT8620132A0 (it)	1986-04-18
US4780624A (en)	1988-10-25
DE3713107A1 (de)	1987-10-22

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Legal Events

Date	Code	Title	Description
1999-10-27	TA	Fee payment date (situation as of event date), data collected since 19931001	Effective date: 19970429