ITMI20042473A1 - Sistema per l'effettuazione di verifiche rapide durante la configurazione delle celle di riferimento flash - Google Patents

Sistema per l'effettuazione di verifiche rapide durante la configurazione delle celle di riferimento flash

Info

Publication number: ITMI20042473A1
Authority: IT; Italy
Prior art keywords: configuration; reference cells; performing quick; checks during; flash reference
Prior art date: 2004-12-23

Application number

IT002473A

Other languages

English (en)

Inventor

Simone Bartoli

Lorenzo Bedarida

Massimiliano Frulio

Stefano Surico

Original Assignee

Atmel Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2004-12-23

Filing date

2004-12-23

Publication date

2005-03-23

2004-12-23 Application filed by Atmel Corp filed Critical Atmel Corp

2004-12-23 Priority to IT002473A priority Critical patent/ITMI20042473A1/it

2005-03-23 Publication of ITMI20042473A1 publication Critical patent/ITMI20042473A1/it

2005-03-24 Priority to US11/089,268 priority patent/US7158415B2/en

2005-11-18 Priority to EP05848820A priority patent/EP1831892A4/en

2005-11-18 Priority to CN2005800442519A priority patent/CN101088127B/zh

2005-11-18 Priority to PCT/US2005/042083 priority patent/WO2006071402A1/en

2005-12-12 Priority to TW094143902A priority patent/TWI384358B/zh

Links

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5004—Voltage

IT002473A 2004-12-23 2004-12-23 Sistema per l'effettuazione di verifiche rapide durante la configurazione delle celle di riferimento flash ITMI20042473A1 (it)

Priority Applications (6)

Application Number	Priority Date	Filing Date	Title
IT002473A ITMI20042473A1 (it)	2004-12-23	2004-12-23	Sistema per l'effettuazione di verifiche rapide durante la configurazione delle celle di riferimento flash
US11/089,268 US7158415B2 (en)	2004-12-23	2005-03-24	System for performing fast testing during flash reference cell setting
EP05848820A EP1831892A4 (en)	2004-12-23	2005-11-18	SYSTEM FOR IMPLEMENTING QUICK TEST DURING THE ADJUSTMENT OF FLASH REFERENCE CELLS
CN2005800442519A CN101088127B (zh)	2004-12-23	2005-11-18	用于在存储器件中编程参比单元的方法和系统
PCT/US2005/042083 WO2006071402A1 (en)	2004-12-23	2005-11-18	System for performing fast testing during flash reference cell setting
TW094143902A TWI384358B (zh)	2004-12-23	2005-12-12	用以程式化記憶體裝置之參考單元的系統及方法

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
IT002473A ITMI20042473A1 (it)	2004-12-23	2004-12-23	Sistema per l'effettuazione di verifiche rapide durante la configurazione delle celle di riferimento flash

Publications (1)

Publication Number	Publication Date
ITMI20042473A1 true ITMI20042473A1 (it)	2005-03-23

Family

ID=36611323

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
IT002473A ITMI20042473A1 (it)	2004-12-23	2004-12-23	Sistema per l'effettuazione di verifiche rapide durante la configurazione delle celle di riferimento flash

Country Status (4)

Country	Link
US (1)	US7158415B2 (it)
CN (1)	CN101088127B (it)
IT (1)	ITMI20042473A1 (it)
TW (1)	TWI384358B (it)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US20030115191A1 (en) *	2001-12-17	2003-06-19	Max Copperman	Efficient and cost-effective content provider for customer relationship management (CRM) or other applications
US7167397B2 (en) *	2005-06-21	2007-01-23	Intel Corporation	Apparatus and method for programming a memory array
US7257038B2 (en) *	2006-01-03	2007-08-14	Infineon Technologies Ag	Test mode for IPP current measurement for wordline defect detection
US7414891B2 (en)	2007-01-04	2008-08-19	Atmel Corporation	Erase verify method for NAND-type flash memories
JP2008192232A (ja) *	2007-02-05	2008-08-21	Spansion Llc	半導体装置およびその制御方法
US20080232169A1 (en) *	2007-03-20	2008-09-25	Atmel Corporation	Nand-like memory array employing high-density nor-like memory devices
US20090219776A1 (en)	2008-02-29	2009-09-03	Xian Liu	Non-volatile memory device with plural reference cells, and method of setting the reference cells
US7787282B2 (en)	2008-03-21	2010-08-31	Micron Technology, Inc.	Sensing resistance variable memory
US7787307B2 (en) *	2008-12-08	2010-08-31	Micron Technology, Inc.	Memory cell shift estimation method and apparatus
JPWO2011033701A1 (ja) *	2009-09-16	2013-02-07	パナソニック株式会社	半導体記憶装置
CN102347084B (zh) *	2010-08-03	2014-05-07	北京兆易创新科技股份有限公司	参考单元阈值电压的调整方法、装置和测试系统
US8406072B2 (en) *	2010-08-23	2013-03-26	Qualcomm Incorporated	System and method of reference cell testing
CN102708922B (zh) *	2011-03-28	2016-03-09	北京兆易创新科技股份有限公司	参考电流的调整方法、装置和非易失存储器芯片
JP6515606B2 (ja) *	2015-03-16	2019-05-22	セイコーエプソン株式会社	半導体集積回路装置及びそれを用いた電子機器

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP3454520B2 (ja)	1990-11-30	2003-10-06	インテル・コーポレーション	フラッシュ記憶装置の書込み状態を確認する回路及びその方法
US5608679A (en)	1994-06-02	1997-03-04	Intel Corporation	Fast internal reference cell trimming for flash EEPROM memory
US5444656A (en)	1994-06-02	1995-08-22	Intel Corporation	Apparatus for fast internal reference cell trimming
DE69514790T2 (de) *	1995-07-14	2000-08-03	Stmicroelectronics S.R.L., Agrate Brianza	Verfahren zur Einstellung der Schwellspannung einer Referenzspeicherzelle
US5822250A (en)	1996-08-30	1998-10-13	Texas Instruments Incorporated	Circuit and process for autotrim of embedded threshold voltage reference bit
US5961653A (en) *	1997-02-19	1999-10-05	International Business Machines Corporation	Processor based BIST for an embedded memory
KR100301817B1 (ko) *	1999-06-29	2001-11-01	김영환	레퍼런스 메모리셀의 초기화 회로 및 그를 이용한 초기화 방법
US6418054B1 (en)	1999-08-31	2002-07-09	Advanced Micro Devices, Inc.	Embedded methodology to program/erase reference cells used in sensing flash cells
US6466480B2 (en) *	2001-03-27	2002-10-15	Micron Technology, Inc.	Method and apparatus for trimming non-volatile memory cells
US6584017B2 (en) *	2001-04-05	2003-06-24	Saifun Semiconductors Ltd.	Method for programming a reference cell
JP3796457B2 (ja) *	2002-02-28	2006-07-12	富士通株式会社	不揮発性半導体記憶装置
JP4068863B2 (ja) *	2002-03-08	2008-03-26	富士通株式会社	不揮発性多値半導体メモリ

2004
- 2004-12-23 IT IT002473A patent/ITMI20042473A1/it unknown
2005
- 2005-03-24 US US11/089,268 patent/US7158415B2/en not_active Expired - Fee Related
- 2005-11-18 CN CN2005800442519A patent/CN101088127B/zh not_active Expired - Fee Related
- 2005-12-12 TW TW094143902A patent/TWI384358B/zh not_active IP Right Cessation

Also Published As

Publication number	Publication date
TW200629057A (en)	2006-08-16
TWI384358B (zh)	2013-02-01
US20060140030A1 (en)	2006-06-29
US7158415B2 (en)	2007-01-02
CN101088127A (zh)	2007-12-12
CN101088127B (zh)	2011-04-20

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