ITRM960563A0 - - Google Patents

Info

Publication number
ITRM960563A0
ITRM960563A0 ITRM960563A ITRM960563A ITRM960563A0 IT RM960563 A0 ITRM960563 A0 IT RM960563A0 IT RM960563 A ITRM960563 A IT RM960563A IT RM960563 A ITRM960563 A IT RM960563A IT RM960563 A0 ITRM960563 A0 IT RM960563A0
Authority
IT
Italy
Application number
ITRM960563A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to IT96RM000563A priority Critical patent/IT1284245B1/it
Publication of ITRM960563A0 publication Critical patent/ITRM960563A0/it
Priority to SG1997002788A priority patent/SG76524A1/en
Priority to EP97830413A priority patent/EP0825615A3/en
Priority to KR1019970037319A priority patent/KR19980018371A/ko
Priority to JP9243319A priority patent/JPH10106294A/ja
Publication of ITRM960563A1 publication Critical patent/ITRM960563A1/it
Application granted granted Critical
Publication of IT1284245B1 publication Critical patent/IT1284245B1/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44Indication or identification of errors, e.g. for repair
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/36Data generation devices, e.g. data inverters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38Response verification devices
IT96RM000563A 1996-08-05 1996-08-05 Sistema di collaudo per moduli di memoria simm fabbricati con l'uso di chip di memoria affetti da difettosita' IT1284245B1 (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT96RM000563A IT1284245B1 (it) 1996-08-05 1996-08-05 Sistema di collaudo per moduli di memoria simm fabbricati con l'uso di chip di memoria affetti da difettosita'
SG1997002788A SG76524A1 (en) 1996-08-05 1997-08-05 Specialized hardware and software to test simm's manufactured using non compliant memory chips
EP97830413A EP0825615A3 (en) 1996-08-05 1997-08-05 System and method for testing audio RAM memories
KR1019970037319A KR19980018371A (ko) 1996-08-05 1997-08-05 논 컴플리언트 메모리 칩을 이용하여 제조된 simm을 테스트하기 위한 특수 하드웨어 및 소프트웨어
JP9243319A JPH10106294A (ja) 1996-08-05 1997-08-05 Simmメモリモジュールのための試験システムおよび方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT96RM000563A IT1284245B1 (it) 1996-08-05 1996-08-05 Sistema di collaudo per moduli di memoria simm fabbricati con l'uso di chip di memoria affetti da difettosita'

Publications (3)

Publication Number Publication Date
ITRM960563A0 true ITRM960563A0 (it) 1996-08-05
ITRM960563A1 ITRM960563A1 (it) 1998-02-05
IT1284245B1 IT1284245B1 (it) 1998-05-14

Family

ID=11404384

Family Applications (1)

Application Number Title Priority Date Filing Date
IT96RM000563A IT1284245B1 (it) 1996-08-05 1996-08-05 Sistema di collaudo per moduli di memoria simm fabbricati con l'uso di chip di memoria affetti da difettosita'

Country Status (5)

Country Link
EP (1) EP0825615A3 (it)
JP (1) JPH10106294A (it)
KR (1) KR19980018371A (it)
IT (1) IT1284245B1 (it)
SG (1) SG76524A1 (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100612127B1 (ko) 2004-09-22 2006-08-11 삼성전자주식회사 메모리 모듈 테스트 방법 및 이를 위한 메모리 모듈의 허브

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5537631A (en) * 1994-03-21 1996-07-16 Current Logic Systems, Inc. Memory management technique for defective memory

Also Published As

Publication number Publication date
EP0825615A3 (en) 1999-06-09
SG76524A1 (en) 2000-11-21
JPH10106294A (ja) 1998-04-24
IT1284245B1 (it) 1998-05-14
KR19980018371A (ko) 1998-06-05
EP0825615A2 (en) 1998-02-25
ITRM960563A1 (it) 1998-02-05

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Legal Events

Date Code Title Description
0001 Granted