ITTO20021035A1 - Dispositivo di memoria non volatile a lettura e scrittura simulante. - Google Patents
Dispositivo di memoria non volatile a lettura e scrittura simulante.Info
- Publication number
- ITTO20021035A1 ITTO20021035A1 IT001035A ITTO20021035A ITTO20021035A1 IT TO20021035 A1 ITTO20021035 A1 IT TO20021035A1 IT 001035 A IT001035 A IT 001035A IT TO20021035 A ITTO20021035 A IT TO20021035A IT TO20021035 A1 ITTO20021035 A1 IT TO20021035A1
- Authority
- IT
- Italy
- Prior art keywords
- reading
- memory device
- volatile memory
- non volatile
- simulating writing
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
- G11C2216/22—Nonvolatile memory in which reading can be carried out from one memory bank or array whilst a word or sector in another bank or array is being erased or programmed simultaneously
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT001035A ITTO20021035A1 (it) | 2002-11-29 | 2002-11-29 | Dispositivo di memoria non volatile a lettura e scrittura simulante. |
| US10/719,650 US6950337B2 (en) | 2002-11-29 | 2003-11-21 | Nonvolatile memory device with simultaneous read/write |
| EP03104345A EP1424699A3 (en) | 2002-11-29 | 2003-11-24 | Nonvolatile memory device with simultaneous read/write |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT001035A ITTO20021035A1 (it) | 2002-11-29 | 2002-11-29 | Dispositivo di memoria non volatile a lettura e scrittura simulante. |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ITTO20021035A1 true ITTO20021035A1 (it) | 2004-05-30 |
Family
ID=32259986
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT001035A ITTO20021035A1 (it) | 2002-11-29 | 2002-11-29 | Dispositivo di memoria non volatile a lettura e scrittura simulante. |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6950337B2 (it) |
| EP (1) | EP1424699A3 (it) |
| IT (1) | ITTO20021035A1 (it) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8948263B2 (en) * | 2004-02-03 | 2015-02-03 | Broadcom Corporation | Read/write separation in video request manager |
| US7539062B2 (en) | 2006-12-20 | 2009-05-26 | Micron Technology, Inc. | Interleaved memory program and verify method, device and system |
| KR100856828B1 (ko) * | 2007-04-23 | 2008-09-05 | 경희대학교 산학협력단 | 리드 액세스와 라이트 액세스를 동시에 수행하는 메모리장치 |
| CN102045478B (zh) * | 2009-10-23 | 2013-05-01 | 精工爱普生株式会社 | 图像读取装置、校正处理方法及用该装置的图像处理方法 |
| EP3295310A4 (en) * | 2015-05-14 | 2018-12-26 | Adesto Technologies Corporation | Concurrent read and reconfigured write operations in a memory device |
| US9627016B2 (en) | 2015-09-10 | 2017-04-18 | Cypress Semiconductor Corporation | Systems, methods, and devices for parallel read and write operations |
| US10719237B2 (en) | 2016-01-11 | 2020-07-21 | Micron Technology, Inc. | Apparatuses and methods for concurrently accessing multiple partitions of a non-volatile memory |
| US10254967B2 (en) | 2016-01-13 | 2019-04-09 | Sandisk Technologies Llc | Data path control for non-volatile memory |
| US10528286B2 (en) | 2016-11-11 | 2020-01-07 | Sandisk Technologies Llc | Interface for non-volatile memory |
| US10528267B2 (en) | 2016-11-11 | 2020-01-07 | Sandisk Technologies Llc | Command queue for storage operations |
| US10528255B2 (en) | 2016-11-11 | 2020-01-07 | Sandisk Technologies Llc | Interface for non-volatile memory |
| US10114589B2 (en) * | 2016-11-16 | 2018-10-30 | Sandisk Technologies Llc | Command control for multi-core non-volatile memory |
| DE102021107045B4 (de) | 2021-03-10 | 2024-11-21 | Elmos Semiconductor Se | Rechnersystem für eine Motorsteuerung mit einem Programmspeicher und einem Datenspeicher |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63184987A (ja) * | 1987-01-28 | 1988-07-30 | Nec Corp | 半導体記憶装置 |
| EP0745995B1 (en) | 1995-05-05 | 2001-04-11 | STMicroelectronics S.r.l. | Nonvolatile, in particular flash-EEPROM, memory device |
| US5847998A (en) * | 1996-12-20 | 1998-12-08 | Advanced Micro Devices, Inc. | Non-volatile memory array that enables simultaneous read and write operations |
| KR100245276B1 (ko) * | 1997-03-15 | 2000-02-15 | 윤종용 | 버스트 모드 성능을 갖는 랜덤 억세스 메모리 장치 및 그의 동작 방법 |
| US5847994A (en) * | 1997-09-08 | 1998-12-08 | Mitsubishi Denki Kabushiki Kaisha | Non-volatile semiconductor memory device having a back ground operation mode |
| US5894437A (en) * | 1998-01-23 | 1999-04-13 | Hyundai Elecronics America, Inc. | Concurrent read/write architecture for a flash memory |
| US6016270A (en) * | 1998-03-06 | 2000-01-18 | Alliance Semiconductor Corporation | Flash memory architecture that utilizes a time-shared address bus scheme and separate memory cell access paths for simultaneous read/write operations |
| US6331950B1 (en) * | 1999-10-19 | 2001-12-18 | Fujitsu Limited | Write protect input implementation for a simultaneous operation flash memory device |
| US6480417B2 (en) * | 2001-03-15 | 2002-11-12 | Intel Corporation | Global/local memory decode with independent program and read paths and shared local decode |
-
2002
- 2002-11-29 IT IT001035A patent/ITTO20021035A1/it unknown
-
2003
- 2003-11-21 US US10/719,650 patent/US6950337B2/en not_active Expired - Lifetime
- 2003-11-24 EP EP03104345A patent/EP1424699A3/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| EP1424699A3 (en) | 2005-08-03 |
| US6950337B2 (en) | 2005-09-27 |
| EP1424699A2 (en) | 2004-06-02 |
| US20040156235A1 (en) | 2004-08-12 |
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