ITTO20050630A1 - Dispositivo di potenza a semiconduttore a porta isolata formata in uno scavo e relativo procedimento di fabbricazione - Google Patents
Dispositivo di potenza a semiconduttore a porta isolata formata in uno scavo e relativo procedimento di fabbricazioneInfo
- Publication number
- ITTO20050630A1 ITTO20050630A1 IT000630A ITTO20050630A ITTO20050630A1 IT TO20050630 A1 ITTO20050630 A1 IT TO20050630A1 IT 000630 A IT000630 A IT 000630A IT TO20050630 A ITTO20050630 A IT TO20050630A IT TO20050630 A1 ITTO20050630 A1 IT TO20050630A1
- Authority
- IT
- Italy
- Prior art keywords
- excavation
- power device
- device formed
- manufacturing procedure
- semiconductor power
- Prior art date
Links
- 238000009412 basement excavation Methods 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0295—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the source electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
- H10D62/107—Buried supplementary regions, e.g. buried guard rings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/156—Drain regions of DMOS transistors
- H10D62/157—Impurity concentrations or distributions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
- H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
- H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
- H10D64/663—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a silicide layer contacting the layer of silicon, e.g. polycide gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
- H10D64/683—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being parallel to the channel plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
- H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT000630A ITTO20050630A1 (it) | 2005-09-15 | 2005-09-15 | Dispositivo di potenza a semiconduttore a porta isolata formata in uno scavo e relativo procedimento di fabbricazione |
| US11/531,796 US20070063272A1 (en) | 2005-09-15 | 2006-09-14 | Semiconductor power device with insulated gate formed in a trench, and manufacturing process thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT000630A ITTO20050630A1 (it) | 2005-09-15 | 2005-09-15 | Dispositivo di potenza a semiconduttore a porta isolata formata in uno scavo e relativo procedimento di fabbricazione |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ITTO20050630A1 true ITTO20050630A1 (it) | 2007-03-16 |
Family
ID=37883216
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT000630A ITTO20050630A1 (it) | 2005-09-15 | 2005-09-15 | Dispositivo di potenza a semiconduttore a porta isolata formata in uno scavo e relativo procedimento di fabbricazione |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20070063272A1 (it) |
| IT (1) | ITTO20050630A1 (it) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI222685B (en) * | 2003-12-18 | 2004-10-21 | Episil Technologies Inc | Metal oxide semiconductor device and fabricating method thereof |
| US7897462B2 (en) * | 2008-11-14 | 2011-03-01 | Semiconductor Components Industries, L.L.C. | Method of manufacturing semiconductor component with gate and shield electrodes in trenches |
| US20100123193A1 (en) * | 2008-11-14 | 2010-05-20 | Burke Peter A | Semiconductor component and method of manufacture |
| US8664713B2 (en) | 2008-12-31 | 2014-03-04 | Stmicroelectronics S.R.L. | Integrated power device on a semiconductor substrate having an improved trench gate structure |
| IT1396561B1 (it) * | 2009-03-13 | 2012-12-14 | St Microelectronics Srl | Metodo per realizzare un dispositivo di potenza con struttura trench-gate e relativo dispositivo |
| KR101107658B1 (ko) | 2009-06-09 | 2012-01-20 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
| KR101142335B1 (ko) | 2009-06-15 | 2012-05-17 | 에스케이하이닉스 주식회사 | 반도체 소자 및 그 제조방법 |
| US8592266B2 (en) | 2010-10-27 | 2013-11-26 | International Business Machines Corporation | Replacement gate MOSFET with a high performance gate electrode |
| US9006063B2 (en) * | 2013-06-28 | 2015-04-14 | Stmicroelectronics S.R.L. | Trench MOSFET |
| CN106876276A (zh) * | 2017-01-04 | 2017-06-20 | 上海华虹宏力半导体制造有限公司 | 沟槽型双层栅mos结构的制造方法 |
| CN111863617A (zh) * | 2019-04-24 | 2020-10-30 | 帅群微电子股份有限公司 | 沟槽式功率半导体组件及其制造方法 |
| CN113437141A (zh) * | 2021-06-24 | 2021-09-24 | 电子科技大学 | 一种具有多晶硅二极管栅极结构的浮空p区cstbt器件 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6147377A (en) * | 1998-03-30 | 2000-11-14 | Advanced Micro Devices, Inc. | Fully recessed semiconductor device |
| US6156606A (en) * | 1998-11-17 | 2000-12-05 | Siemens Aktiengesellschaft | Method of forming a trench capacitor using a rutile dielectric material |
| DE19935442C1 (de) * | 1999-07-28 | 2000-12-21 | Siemens Ag | Verfahren zum Herstellen eines Trench-MOS-Leistungstransistors |
| JP4363736B2 (ja) * | 2000-03-01 | 2009-11-11 | 新電元工業株式会社 | トランジスタ及びその製造方法 |
| GB0028031D0 (en) * | 2000-11-17 | 2001-01-03 | Koninkl Philips Electronics Nv | Trench-gate field-effect transistors and their manufacture |
| TWI248136B (en) * | 2002-03-19 | 2006-01-21 | Infineon Technologies Ag | Method for fabricating a transistor arrangement having trench transistor cells having a field electrode |
| US7091573B2 (en) * | 2002-03-19 | 2006-08-15 | Infineon Technologies Ag | Power transistor |
| CN101421832A (zh) * | 2004-03-01 | 2009-04-29 | 国际整流器公司 | 沟槽器件的自对准接触结构 |
-
2005
- 2005-09-15 IT IT000630A patent/ITTO20050630A1/it unknown
-
2006
- 2006-09-14 US US11/531,796 patent/US20070063272A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US20070063272A1 (en) | 2007-03-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ITTO20050630A1 (it) | Dispositivo di potenza a semiconduttore a porta isolata formata in uno scavo e relativo procedimento di fabbricazione | |
| ITMI20050917A1 (it) | Dispositivo integrato a semiconduttore composito di potenza e metodo di fabbricazione dello stesso | |
| EP1749316A4 (en) | PERYLENE-N-TYPE SEMICONDUCTORS AND ASSOCIATED DEVICES | |
| IL181187A0 (en) | Semiconductor radiation detector with a modified internal gate structure | |
| EP2020690A4 (en) | SEMICONDUCTOR LIGHT EMITTER AND PLATELET | |
| DE602007013325D1 (de) | Halbleitervorrichtung und Herstellungsverfahren dafür | |
| TWI318007B (en) | Insulation gate type semiconductor device and its manufacturing method | |
| DE112007000707A5 (de) | Tor, insbesondere Sektionaltor, und Torantriebsvorrichtung | |
| ITMI20062176A1 (it) | Dispositivo semiconduttore avente una regione di separazione | |
| TWI349956B (en) | Semiconductor device with gate stack structure | |
| EP1922755A4 (en) | Semiconductor device having improved mechanical and thermal reliability | |
| ITTO20050015A1 (it) | Dispositivo di connessione per correnti elevate e relativo elemento di contatto | |
| KR101553709B9 (ko) | 반도체 소자 제조용 로드락 챔버와 이를 이용한 반도체 소자의 제조장치 | |
| MA28719B1 (fr) | Mecanisme electrique encastrable et plurifonctionnel | |
| ITTO20050203A1 (it) | Filatorio e suo procedimento di funzionamento | |
| ITTO20030013A1 (it) | Dispositivo dmos di dimensioni ridotte e relativo procedimento di fabbricazione. | |
| ITMI20050119A1 (it) | Struttura di pannello e relativo procedimento di realizzazione | |
| ITMI20051632A1 (it) | Dispositivo di strozzamento | |
| FR2881575B1 (fr) | Transistor mos a grille totalement siliciuree | |
| IT1393346B1 (it) | Dispositivo con componente semiconduttore, e procedimento di fabbricazione | |
| DE602006006517D1 (de) | Halbleiterspeichervorrichtung und elektronisches Gerät | |
| DE602005009987D1 (de) | Halbleitervorrichtung und Herstellungsverfahren dazu | |
| DE602006003509D1 (de) | Halbleiterspeicheranordnung | |
| DE502006003015D1 (de) | Zweistufig öffnender kraftstoffinjektor | |
| ITVA20050038A1 (it) | Transistore bipolare di potenza e relativo dispositivo integrato con clamp della tensione di collettore |