JP2000077476A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

(57) [Problem] To provide a semiconductor device having a size equivalent to a semiconductor element. Provide a semiconductor device that can be easily manufactured at low cost. Provided is a semiconductor device in which required electrical connection is reliably achieved even when the arrangement pitch of electrodes of a semiconductor element is small. A method for manufacturing the above semiconductor device. A semiconductor device according to the present invention includes a substrate and a semiconductor element having a plurality of pad electrodes provided on one surface of the substrate via a sealing layer and having a surface in contact with the sealing layer. The substrate has substantially the same size as the semiconductor element, and has a plurality of connection electrodes arranged on one surface corresponding to each of the pad electrodes, and the sealing layer is provided in the curable resin. Conductive particles are contained, the conductive particles are dispersed in a state oriented in the thickness direction of the sealing layer, and each of the pad electrodes is connected to each of the connection electrodes via a conductive path formed by the conductive particles. It is electrically connected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device in which a semiconductor element having a pad electrode is packaged, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, in a semiconductor device, the number of electrodes has been increased with higher functionality and higher capacity of a semiconductor element to be mounted. That is, the center-to-center distance between adjacent electrodes tends to be small and the density tends to be high. Conventionally, as such a small semiconductor device, a CSP (Chip Scale) has been used.
Package) is known.

FIG. 22 is an explanatory sectional view showing the structure of an example of such a conventional semiconductor device. In this semiconductor device 80, a semiconductor element (semiconductor chip) 81 having a pad electrode 82 on an upper surface is fixedly arranged on an upper surface of a substrate 85. On the lower surface of the substrate 85, a protruding electrode 86 made of, for example, solder is formed. The protruding electrode 86 is electrically connected to a wiring portion 87 formed on the upper surface of the substrate 85. The pad electrode 82 of the semiconductor element 81 is electrically connected to the wiring portion 87 of the substrate 85 by a wire 83, and is formed of, for example, a thermosetting resin so as to cover the upper surface of the substrate 85 and the surface of the semiconductor element 80. The package is formed by forming the portion 88.

[0004] Such a semiconductor device 80 is mounted on a wiring board such as a motherboard as follows. As shown in FIG. 23A, the semiconductor device 80 is placed on the wiring substrate 90 on which the terminal electrodes 91 are formed according to a pattern opposite to the projecting electrodes 86 of the semiconductor device 80.
6 are arranged so as to be in contact with the corresponding terminal electrodes 91. In this state, the protruding electrode 86 of the semiconductor device 80 is melted, so that the protruding electrode 86 is connected to the terminal electrode 9 of the wiring board 90 as shown in FIG.
Join to 1. Then, the semiconductor device 80 is mounted on the wiring substrate 90 by forming the adhesive layer 95 between the lower surface of the semiconductor device 80 and the upper surface of the wiring substrate 90.

According to such a semiconductor device 80, each of the protruding electrodes 86 can be collectively connected to each of the corresponding terminal electrodes 91 of the wiring board 90, and the terminal electrodes of the wiring board 90 can be connected together. Since the arrangement pitch of the wires 91 can be increased, the burden of manufacturing the wiring board 90 can be reduced.

However, the semiconductor device having the above configuration has the following problems. (1) It is necessary to use a substrate 85 having a size larger than that of the semiconductor element 81 to be mounted, because of the formation of the wiring portion 87 and the formation of the sealing portion 88. Cannot be constructed. (2) In manufacturing a semiconductor device, a step of bonding the semiconductor element 81 onto the substrate 85,
Since the process of connecting to the wiring portion 87 and the process of forming the sealing portion 88 are required, the entire manufacturing process is extremely complicated. Therefore, the manufacturing cost of the semiconductor device becomes considerably high.

(3) In the manufacture of a semiconductor device, from the viewpoint of quality assurance, an electrical inspection before packaging, that is, an electrical inspection of a semiconductor element itself, and an electrical inspection after packaging, that is, a semiconductor. An electrical inspection of the entire device is performed. Of these, the electrical inspection of the semiconductor element itself can be performed in a wafer state. That is, a large number of semiconductor elements on the wafer
Since the inspection can be performed by two inspection processes, the inspection time and the inspection cost can be reduced.
On the other hand, electrical inspection of a semiconductor device needs to be performed individually for each semiconductor device, and since small semiconductor devices are inconvenient to handle, it is necessary to perform electrical inspection of the semiconductor device. Requires a long time, and the inspection cost is considerably increased.

[0008]

SUMMARY OF THE INVENTION The present invention has been made based on the above circumstances. A first object of the present invention is to provide a semiconductor device having the same size as a mounted semiconductor element. A second object of the present invention is to provide a semiconductor device that can be easily manufactured at low cost. A third object of the present invention is to provide a semiconductor device capable of reliably achieving required electrical connection even when the arrangement pitch of pad electrodes of a mounted semiconductor element is small. . A fourth object of the present invention is to provide a method capable of advantageously and reliably manufacturing the above-described semiconductor device.

[0009]

According to the present invention, there is provided a semiconductor device comprising:
A substrate, which is provided integrally on one surface of the substrate with a sealing layer interposed therebetween, and includes a semiconductor element having a plurality of pad electrodes on a surface facing the sealing layer, wherein the substrate is The semiconductor device has substantially the same size as the semiconductor device, and has a plurality of connection electrodes arranged on one surface corresponding to each of the pad electrodes of the semiconductor device. Contains conductive particles, the conductive particles are dispersed in a state oriented in the thickness direction of the sealing layer, via a conductive path formed by the conductive particles in the sealing layer, Each of the pad electrodes of the semiconductor element is electrically connected to each of the connection electrodes of the substrate.

[0010] The semiconductor device of the present invention is provided integrally with a substrate and a sealing layer on one surface of the substrate.
A semiconductor element having a plurality of pad electrodes on a surface in contact with the sealing layer, wherein the substrate has substantially the same size as the semiconductor element, and a pad electrode of the semiconductor element on one surface. Has a plurality of connection electrodes arranged in correspondence with each other, the sealing layer contains conductive particles in a curable resin, and the conductive particles are densely filled. A plurality of conductive portions extending in the thickness direction, and an insulating portion that insulates the conductive portions from each other, wherein each of the conductive portions is a connection electrode of the substrate and a pad electrode of the semiconductor element. And each of the pad electrodes of the semiconductor element is electrically connected to each of the connection electrodes of the substrate via the conductive portion.

Further, the semiconductor device of the present invention comprises a substrate and a plurality of substrates provided on one surface of the substrate via a sealing layer made of a curable resin material, the surfaces being in contact with the sealing layer. A semiconductor element having a pad electrode, and a plurality of conductive path elements, which are provided integrally with the sealing layer so as to extend through in the thickness direction thereof and include conductive particles in a polymer substance. The substrate has substantially the same size as the semiconductor element, and has a plurality of connection electrodes arranged on one surface corresponding to each of the pad electrodes of the semiconductor element, Each of the conductive path elements is disposed between each of the connection electrodes of the substrate and each of the pad electrodes of the semiconductor element, and each of the pad electrodes of the semiconductor element is connected to the substrate via the conductive path element. Electrically connected to each of the connection electrodes It is characterized in that is.

In the above semiconductor device, it is preferable that the polymer material constituting the conductive path element has elasticity. Further, the semiconductor elements may be in a wafer state, and each of the semiconductor elements in the wafer may be provided integrally with the substrate via a sealing layer.

According to the method of manufacturing a semiconductor device of the present invention, a pad electrode is provided on one surface of a substrate via a sealing layer material layer in which conductive particles exhibiting magnetism are dispersed in a liquid curable resin material. The semiconductor element is arranged such that one surface on which is formed is in contact with the sealing layer material layer, and a magnetic field is applied to the sealing layer material layer in a thickness direction thereof, whereby the conductive particles are formed. A step of forming a sealing layer between the substrate and the semiconductor element by orienting the sealing layer material layer in a thickness direction thereof and curing the sealing layer material layer in this state. It is characterized by.

Further, a method of manufacturing a semiconductor device according to the present invention
On one surface of the substrate, via a sealing layer material layer in which conductive particles showing magnetism are dispersed in a liquid curable resin material,
The semiconductor element is arranged so that one surface on which the pad electrode is formed is in contact with the sealing layer material layer, and a portion of the semiconductor element positioned on the pad electrode of the semiconductor element in a thickness direction with respect to the sealing layer material layer. By applying a magnetic field, the conductive particles are aggregated in a portion located on the pad electrode and oriented in the thickness direction, and in this state, the sealing layer material layer is cured to form the substrate and the substrate. A step of forming a sealing layer between the semiconductor element and the semiconductor element.

Further, the semiconductor device of the present invention comprises a resin sheet made of a semi-cured curable resin having through holes formed according to a pattern corresponding to a pad electrode of a semiconductor element, and a through hole formed in the resin sheet. Provided in the, prepared a sealing composite sheet having a conductive path element containing conductive particles in a polymer substance, on one surface of the substrate, via the sealing composite sheet, A step of forming a sealing layer between the substrate and the semiconductor element by arranging a semiconductor element such that a pad electrode is in contact with a conductive path element of the sealing composite sheet and curing the semiconductor element in this state. It is characterized by having.

In the method of manufacturing a semiconductor device according to the present invention, a wafer on which a plurality of semiconductor elements are formed and a plurality of substrates arranged corresponding to each of the semiconductor elements on the wafer are integrally connected. It is preferable that a sealing layer is formed between each of the semiconductor elements on the wafer and each of the substrates on the substrate link, using the substrate link.

[0017]

(1) Since the semiconductor device is packaged by being integrally provided on a substrate having substantially the same size via a sealing layer, the semiconductor device has the same size as the semiconductor device. A device is obtained. (2) Since the sealing layer only needs to be provided on one surface of the semiconductor element on which the pad electrode is formed, the packaging of the semiconductor element and the electrical inspection of the obtained semiconductor device can be performed in a wafer state. it can. (3) The sealing layer is formed with a conductive path extending in the thickness direction of the conductive particles or a conductive portion densely filled with the conductive particles, or the conductive particles are contained in a polymer substance. Since the conductive path element is provided, and thereby the electrical connection between the pad electrode of the semiconductor element and the connection electrode formed on one surface of the substrate is achieved, it is not necessary to perform a bonding step.

[0018]

Embodiments of the present invention will be described below in detail. <First Embodiment> FIG. 1 is an explanatory cross-sectional view schematically showing the structure of an example of a semiconductor device according to the present invention.
FIG. 2 is an explanatory sectional view showing a part of the semiconductor device shown in FIG. 1 in an enlarged manner. In this semiconductor device 1, a semiconductor element (semiconductor chip) 10 is provided integrally on one surface of a substrate 30 with a sealing layer 20 interposed therebetween. Semiconductor element 1
0 (the lower surface in the figure) in contact with the sealing layer 20
Has a plurality of pad electrodes 1 made of, for example, aluminum.
1 is formed.

The substrate 30 has substantially the same size as the semiconductor element 10, and a plurality of connection electrodes 31 are formed on one surface of the substrate 30 so as to correspond to each of the pad electrodes 11 of the semiconductor element 10. Each of the connection electrodes 31 is arranged to face the corresponding pad electrode 11 of the semiconductor element 10 via the sealing layer 20. Here, “size” means a size in a plane, that is, a dimension of a vertical width and a horizontal width. On the other surface of the substrate 30, a wiring portion 32 of an appropriate pattern is formed, and each of the connection electrodes 31 is connected to the wiring portion 32 via a short-circuit portion 33 extending through the substrate 30 in the thickness direction. 32.
Specific examples of the material forming the substrate 30 include a glass fiber reinforced epoxy resin, a polyimide resin, and ceramics.

As shown in FIG. 2, the sealing layer 20 is made of a curable resin S containing conductive particles R.
In the illustrated example, the conductive particles R are dispersed in the curable resin S while being oriented in the thickness direction of the sealing layer 20. In the sealing layer 20, a conductive path is formed by the plurality of conductive particles R in the thickness direction of the sealing layer 20, and each of the pad electrodes 11 of the semiconductor element 10 corresponds to the conductive path. Electrically connected to each of the connection electrodes 31 of the substrate 30. Thickness d of sealing layer 20
Is appropriately selected according to the arrangement pitch p of the pad electrodes 11 in the semiconductor element 10 and the electrode diameter w. For example,
Arrangement pitch p of pad electrodes 11 in semiconductor element 10
Is 100 μm and the electrode diameter w is 80 μm, the thickness d of the sealing layer 20 is preferably 20 to 500 μm.

As the curable resin material constituting the sealing layer 20, a thermosetting resin material, a radiation curable resin material, or the like can be used. Specific examples of the thermosetting resin material include an epoxy resin material, a polyimide resin material, and a phenol resin material. As the radiation-curable resin material, a material that can be cured by irradiation with light such as visible light, ultraviolet light, infrared light, laser, or X-rays is used. Resin materials, polyimide resin materials, phenolic resin materials, and the like.

As the conductive particles R, it is preferable to use particles exhibiting magnetism because they can be oriented in the thickness direction of the sealing layer 20 by a method described later. As the conductive particles R exhibiting magnetism, those obtained by forming a conductive coating on core particles made of a conductive magnetic material can be preferably used. As the conductive magnetic material forming the core particles, nickel, Examples of the metal material exhibiting magnetism such as iron or an alloy thereof include, as a material constituting the conductive film,
Metal materials such as gold, silver, and palladium can be used.

In addition, a conductive particle R whose surface is treated with a coupling agent such as a silane coupling agent or a titanium coupling agent can be appropriately used as long as the conductivity is not impaired. By treating the surface of the conductive particles R with the coupling agent, the adhesive force between the conductive particles R and the polymer substance is increased, and as a result, the obtained sealing layer 20 has high durability. Becomes

The proportion of the conductive particles R in the sealing layer 20 is preferably 5 to 35% by volume, and particularly preferably 8 to 20%. The particle size of the conductive particles R is appropriately selected according to the size and shape of the pad electrode 11 of the semiconductor element 10. For example, if the pad electrode 11 of the semiconductor element 10 has a width of 10
When the conductive layer R has a square shape of 0 μm, the particle size of the conductive particles R is preferably 10 to 30 μm, whereby good conductivity is obtained in the sealing layer 20 in the thickness direction. As a result, the intended electrical connection can be reliably achieved.

Such a semiconductor device can be manufactured as follows. First, as shown in FIG. 3, a wafer 15 on which a plurality of semiconductor elements 10 are formed, and as shown in FIG. 4, a plurality of semiconductor elements 10 arranged on a wafer 15 in a plane direction corresponding to each of the semiconductor elements 10. And a substrate connector 35 in which the substrates 30 are integrally connected. Then, as shown in FIG. 5, a sealing layer material layer 20 in which conductive particles are dispersed in a liquid curable resin material is formed on one surface of the substrate connecting body 35 on which the pad electrodes 11 are formed.
The intermediate laminated body 1A is configured by arranging the wafer 15 via A so that one surface on which the pad electrode 11 is formed is in contact with the sealing layer material layer 20A.

As a means for forming the sealing layer material layer 20A between the substrate linking body 35 and the wafer 15, a sealing material made of a fluid mixture in which conductive particles are dispersed in a liquid curable resin material is used. The sealing layer material is applied to the surface of the substrate linking body 35 to form the sealing layer material layer 20A on the surface of the substrate linking body 35. Means for arranging the wafer 15 on 20A so that one surface on which the pad electrode 11 is formed is in contact with the sealing layer material layer 20A. Means for forming the sealing layer material layer 20A on one surface of the wafer 15 by coating and arranging the substrate connector 15 on the sealing layer material layer 20A can be mentioned. In the above, since the sealing layer material has a high viscosity due to dispersion of the conductive particles, it is preferable to use a printing method or a roll coating method as a means for applying the sealing layer material. .

The intermediate laminate 1A thus constructed
By applying a magnetic field to the sealing layer material layer 20A in the thickness direction, the conductive particles are oriented in the thickness direction of the sealing material layer 20A. Specifically, FIG.
As shown in FIG.
A pair of electromagnets 3 on the upper surface of
By arranging the electromagnets 36 and 37 and operating the electromagnets 36 and 37, a parallel magnetic field acts in the thickness direction of the sealing layer material layer 20A, and as a result, the conductive particles in the sealing layer material layer 20A R is oriented so as to line up in the thickness direction. Next, in this state, by subjecting the sealing layer material layer 20A to a curing treatment (heating treatment or radiation irradiation treatment), as shown in FIG. 7, between the substrate connector 35 and the wafer 15 in the intermediate laminate 1A. The sealing layer 20 is formed.

In the above description, the intensity of the parallel magnetic field applied to the sealing material layer 20A is 1500 to 20000 on average.
Gaussian dimensions are preferred. The conditions for the curing treatment of the sealing layer material layer 20A are appropriately selected depending on the type of the curable resin material used. For example, when the curable resin material is a thermosetting epoxy resin, the heating temperature is 120 to 150 ° C., the heating time is 0.5 to 2.0 hours, and the curable resin material is thermoset. Heating temperature is 200 to 350 ° C.
The heating time is 0.5 to 2.0 hours. When the curable resin material is a thermosetting phenolic resin material, the heating temperature is 120 to 150 ° C. and the heating time is 1.0.
~ 2.0 hours.

Then, after performing a required inspection on the intermediate laminated body 1A on which the sealing layer 20 is formed, dicing is performed along the streets of the wafer 15 to cut the same, as shown in FIG. The semiconductor device 1 having the configuration is obtained.

According to the above semiconductor device, the semiconductor element 1
0 is packaged by being integrally provided on a substrate 30 of substantially the same size via the sealing layer 20, so that a size equivalent to that of the semiconductor element 10 is obtained. Moreover, the sealing layer 20 is formed of the semiconductor element 1
Since the pad electrode 11 at 0 may be provided only on one surface on which the pad electrode 11 is formed, the packaging of the semiconductor element 10 and the electrical inspection of the obtained semiconductor device can be performed in a wafer state. 20, a conductive path extending in the thickness direction is formed by the conductive particles,
Since the electrical connection between the pad electrode 11 of the semiconductor element 10 and the connection electrode 31 of the substrate 30 is achieved by the conductive path, it is not necessary to perform a bonding step in addition to the step of forming the sealing layer 20. As a result, It can be easily manufactured at low cost.

<Second Embodiment> FIG. 8 is an explanatory cross-sectional view schematically showing the structure of another example of a semiconductor device according to the present invention. FIG. 9 is a sectional view of the semiconductor device shown in FIG. It is explanatory sectional drawing which expands and shows a part. The sealing layer 20 in the semiconductor device 1 of this example includes a plurality of conductive portions 21 that are densely packed in a state where the conductive particles R are oriented in the thickness direction and extend in the thickness direction. And an insulating portion 22 that insulates them. Each of the conductive portions 21 of the sealing layer 20 is disposed between each of the connection electrodes 31 of the substrate 30 and each of the pad electrodes 11 of the semiconductor element 10. Each of the pad electrodes 11 of the corresponding substrate 30
Are electrically connected to the connection electrodes 31. Others
The configuration is basically the same as that of the semiconductor device according to the first embodiment.

The thickness d of the sealing layer 20 is appropriately selected according to the arrangement pitch p of the pad electrodes 11 in the semiconductor element 10 and the electrode diameter w. For example, when the arrangement pitch p of the pad electrodes 11 in the semiconductor element 10 is 100 μm and the electrode diameter w is 80 μm, the thickness d of the sealing layer 20 is 20 to
Preferably it is 500 μm. Further, the ratio of the conductive particles R in the conductive portion 21 of the sealing layer 20 is preferably 5 to 35% by volume, and particularly preferably 8 to 20%.

Such a semiconductor device can be manufactured as follows. First, similarly to the above-described first embodiment, a wafer 15 on which a plurality of semiconductor elements 10 are formed and a plurality of wafers 15 arranged along a plane corresponding to each of the semiconductor elements 10 on the wafer 15. A board connector 35 in which the board 30 is integrally connected is prepared (FIG. 3).
And FIG. 4), a pad is formed on one surface of the substrate connecting body 35 on which the pad electrode 11 is formed, via a sealing layer material layer 20A in which conductive particles are dispersed in a liquid curable resin material. The intermediate laminated body 1A is configured by arranging the wafer 15 such that one surface on which the electrode 11 is formed is in contact with the sealing layer material layer 20A (see FIG. 5).

Then, with respect to the intermediate laminated body 1A, a portion (hereinafter, referred to as a “conductive portion forming portion”) of the sealing layer material layer 20A located on the pad electrode 11 of the semiconductor element 10 in the thickness direction. By applying a magnetic field, the conductive particles are aggregated in the conductive portion forming portion and are oriented in the thickness direction. Specifically, as shown in FIG.
A pair of magnetic pole plates 40 and 4 each including a ferromagnetic portion (shown by hatching) M of a pattern corresponding to the pad electrode 11 of the semiconductor element 10 and a non-magnetic portion N other than the ferromagnetic portion M
1 are arranged on the upper and lower surfaces of the intermediate laminate 1A so that the ferromagnetic portion M is located above and below the conductive portion forming portion 21A, and a pair of electromagnets 36 and 37 are disposed on the upper surface and the lower surface of the pole plate 40. It is arranged on the lower surface of the pole plate 41.
By operating the electromagnets 36 and 37, a parallel magnetic field acts in the thickness direction of the sealing layer material layer 20A. As a result, in the sealing layer material layer 20A, a stronger parallel magnetic field is applied in the thickness direction in the conductive portion forming portion 21A than in other portions, and the parallel magnetic field having this distribution causes the sealing layer material. The conductive particles in the layer 20A are gathered in the conductive portion forming portion 21A, and are further aligned in the thickness direction. Then, in this state, the sealing layer material layer 20A is subjected to a curing treatment (a heating treatment or a radiation irradiation treatment), so that the wafer 15 as shown in FIG.
On one surface of each of the semiconductor elements 10, a plurality of conductive portions 21 arranged on each surface of the bat electrode 11 and densely filled with conductive particles and extending in the thickness direction, Alternatively, the sealing layer 20 having the insulating portion 22 which hardly exists is formed.

In the above, iron, nickel, cobalt, or an alloy thereof can be used as a material forming the ferromagnetic material portion M in the pole plates 40 and 41. As a material constituting the nonmagnetic portion N in the pole plates 40 and 41, a nonmagnetic metal such as copper, a heat-resistant resin such as polyimide, or the like can be used. The strength of the parallel magnetic field applied to the sealing material layer 20A and the conditions for the curing treatment of the sealing material layer 20A are selected from the same ranges as in the manufacturing method in the above-described first embodiment. .

Then, after performing a required inspection on the intermediate laminate 1A on which the sealing layer 20 is formed, dicing is performed along the streets of the wafer 15 to cut the laminate, as shown in FIG. The semiconductor device 1 having the configuration is obtained.

According to the above semiconductor device, the semiconductor element 1
0 is packaged by being integrally provided on a substrate 30 of substantially the same size via the sealing layer 20, so that a size equivalent to that of the semiconductor element 10 is obtained. Moreover, the sealing layer 20 is formed of the semiconductor element 1
Since the pad electrode 11 at 0 may be provided only on one surface on which the pad electrode 11 is formed, the packaging of the semiconductor element 10 and the electrical inspection of the obtained semiconductor device can be performed in a wafer state. 20, a conductive portion 21 extending on the pad electrode 11 and extending in the thickness direction is formed.
Since the electrical connection between the pad electrode 11 and the connection electrode 31 of the substrate 30 is achieved, it is not necessary to perform a bonding step in addition to the step of forming the sealing layer 20, and as a result, it is easy to manufacture at low cost. can do.

The conductive part 21 of the sealing layer 20 is formed corresponding to the pad electrode 11 of the semiconductor element 10.
Moreover, since each of the adjacent conductive portions 21 is insulated from each other by the insulating portion 22, even when the arrangement pitch of the pad electrodes 11 of the semiconductor element 10 is extremely small, the semiconductor element 10 and the substrate 30 are not connected to each other. The required electrical connection can be reliably achieved.

<Third Embodiment> FIG. 12 is a cross-sectional view schematically illustrating the structure of still another example of a semiconductor device according to the present invention. FIG. 13 is a sectional view of the semiconductor device shown in FIG. It is sectional drawing for description which expands and shows a part. In this semiconductor device 1, a semiconductor element 10 is integrally provided on one surface of a substrate 30 having a configuration similar to that of the above-described first embodiment via a sealing layer 20 made of a curable resin material.
A plurality of conductive path elements 25 extending through the sealing layer 20 in the thickness direction are provided integrally. Each of the conductive path elements 25 is arranged between each of the connection electrodes 31 of the substrate 30 and each of the pad electrodes 11 of the semiconductor element 10. Each of the electrodes 11 has a corresponding substrate 3
0 is electrically connected to each of the connection electrodes 31. Each of the adjacent conductive path elements 25 is electrically insulated from each other by the sealing layer 20.

The thickness d of the sealing layer 20 is appropriately selected according to the arrangement pitch p of the pad electrodes 11 in the semiconductor element 10 and the electrode diameter w. For example, when the arrangement pitch p of the pad electrodes 11 in the semiconductor element 10 is 100 μm and the electrode diameter w is 80 μm, the thickness d of the sealing layer 20 is 20 to
Preferably it is 500 μm.

As the curable resin material constituting the sealing layer 20, a thermosetting resin material, a radiation curable resin material, or the like can be used. Specific examples of the thermosetting resin material include an epoxy resin material, a polyimide resin material, a phenol resin material, and a glass fiber reinforced resin material thereof. Radiation-curable resin materials include light such as visible light, ultraviolet light, infrared light,
A material that can be cured by being irradiated with a line or the like is used, and examples thereof include an epoxy-based resin material, a polyimide-based resin material, and a phenol-based resin material imparted with radiation sensitivity. Among these, it is preferable to use a glass fiber reinforced resin material because it has a thermal expansion coefficient similar to that of silicon constituting the semiconductor element 10 and thereby obtains high connection reliability.

As shown in FIG. 13, the conductive path element 25
The conductive material R is contained in the polymer substance T, preferably in a state oriented in the thickness direction. Various types of polymer substances T constituting the conductive path element 25 include:
For example, an elastic polymer material, a curable resin, or the like can be used, but an elastic polymer material having a crosslinked structure is preferable. Curable elastic polymer materials that can be used to obtain such crosslinked elastic polymer materials include, for example, silicone rubber, polybutadiene rubber, natural rubber, polyisoprene, styrene-butadiene copolymer rubber, acrylonitrile-butadiene Copolymer rubber, ethylene-
Examples include propylene copolymer rubber, urethane rubber, polyester rubber, chloroprene rubber, epichlorohydrin rubber, and soft liquid epoxy rubber. The cross-linking agent used for cross-linking the elastic polymer material is not particularly limited, and a generally used cross-linking agent can be used. The amount may be 3 to 15 parts by weight based on 100 parts by weight of the polymer material.

When the conductive path element 25 is made of a curable resin material, the curable resin material may be of the same type as the curable resin material forming the sealing layer 20.
Different types can be used, and specific examples thereof include an epoxy resin material, a polyimide resin material, and a phenol resin material.

The ratio of the conductive particles R in the conductive path element 25 is preferably from 5 to 35%, particularly preferably from 8 to 20% by volume fraction. The particle size of the conductive particles R is appropriately selected according to the size and shape of the pad electrode 11 of the semiconductor element 10. For example, the pad electrode 11 of the semiconductor element 10 has a width of 1
In the case of a 00 μm square, the conductive particles R
Preferably has a particle size of 10 to 30 μm, whereby the conductive path element 21 has good conductivity in its thickness direction, and the intended electrical connection can be reliably achieved. .

Such a semiconductor device can be manufactured as follows. First, similarly to the above-described first embodiment, a wafer 15 on which a plurality of semiconductor elements 10 are formed and a plurality of wafers 15 arranged along a plane corresponding to each of the semiconductor elements 10 on the wafer 15. A board connected body 35 in which the board 30 is integrally connected is prepared (see FIGS. 3 and 4), and a sealing composite sheet 26 as shown in FIG. 14 is prepared. This composite sheet for sealing 2
6 denotes a plurality of through holes 2 according to a pattern corresponding to each pad electrode 11 of the semiconductor element 10 on the wafer 15.
The resin sheet 27 includes a resin sheet 27 having a semi-cured curable resin material on which 5H is formed, and a conductive path element 25 provided in a through hole 25H of the resin sheet 27. Here, the “semi-cured state” refers to a state generally referred to as a “B stage”, and specifically, a state where the sheet is cured to the extent that the shape of the sheet is maintained, and
It means a state where curing is not completely completed, that is, a state where curing can further proceed. Various prepreg resin sheets can be used as such a semi-cured curable resin material. In the illustrated example, the conductive path element 25 is provided so as to protrude from one surface and the other surface of the resin sheet 27. The projecting height of the conductive path element 25 from the resin sheet 27 is preferably 5 to 20% of the thickness of the entire conductive path element 25.

The composite sheet 26 for sealing is obtained, for example, as follows. First, as shown in FIG. 15, metal thin layers 28, 2 are provided on both sides of a resin sheet 27, respectively.
9 is formed, and a hole is formed in the laminated material 26A by a drilling device, a laser device, or the like, thereby forming each of the semiconductor elements 10 on the wafer 15 as shown in FIG. According to a pattern corresponding to the pad electrode 11, a plurality of holes 26H penetrating through the entire laminated material 26A are formed, whereby a through hole 25H is formed in the resin sheet body 27 and the metal thin layer 28, Each of the 29 has an opening 28K,
29K is formed. On the other hand, by dispersing the conductive particles in the above-mentioned material for a polymer substance, a material for a conductive path element made of a fluid mixture is prepared. Then, the prepared conductive path element material is passed through the through-hole 25 of the resin sheet body 27.
By filling the hole 26H of the laminated material 26A containing H, as shown in FIG.
A conductive path element material layer 25A is formed in 6H. After that, by curing the conductive path element material layer 25A, the conductive path element 25 is integrated into the hole 26H of the laminated material 26A including the through hole 25H of the resin sheet 27 as shown in FIG. Formed.

The curing treatment of the conductive path element material layer 25A is as follows.
This is performed under the condition that the curing of the semi-cured curable resin material constituting the resin sheet body 27 does not progress. Specific conditions for the curing treatment are appropriately selected in consideration of the type of the polymer material to be used, the type of the curable resin material constituting the resin sheet body 23, and the like. For example, when the polymer material is a room-temperature-curable silicone rubber, the treatment is performed at room temperature for about 24 hours, at 40 ° C. for about 2 hours, and at 80 ° C. for about 30 minutes.

In the above description, when magnetic particles are used as the conductive particles, the thickness of the conductive path element material layer 25A is increased before or during the curing of the conductive path element material layer 25A. By applying a magnetic field in the direction, the conductive particles in the conductive path element material layer 25A can be oriented in the thickness direction.

More specifically, as shown in FIG.
6H, a pair of electromagnets 36 and 37 are disposed on the upper surface of the thin metal layer 28 and the lower surface of the thin metal layer 29 for the laminated material 26A in which the conductive path element material layer 25A is formed. , A parallel magnetic field acts in the thickness direction of the conductive path element material layer 25A, and as a result, the conductive particles in the conductive path element material layer 25A are oriented so as to be aligned in the thickness direction. Conductive path element material layer 25
The intensity of the parallel magnetic field applied to A is 1500 to 2 on average.
A size of 0000 gauss is preferred.

By removing the thin metal layers 28 and 29 by etching from the laminated material 26A in which the conductive path element 25 is formed in the hole 26H as shown in FIG. The sealing composite sheet 26 provided with the path element 25 protruding from one surface and the other surface of the resin sheet body 27 is obtained.

Then, as shown in FIG. 20, the sealing composite sheet 26 is provided on one surface of the substrate connector 35 on which the connection electrodes 31 are formed, and the respective projecting portions of the conductive path elements 25 are Are arranged so as to be in contact with each of the connection electrodes 31 corresponding to the plurality of semiconductor elements 10 on the sealing composite sheet 26.
Are arranged on the wafer 15 on which is formed a position such that each protruding portion of the conductive path element 21 is in contact with each of the corresponding pad electrodes 11. Then, by performing a curing process while applying pressure in this state, the resin sheet body 27 of the encapsulating composite sheet 26 is cured and is attached to each of the substrate connector 35 and the wafer 15, whereby the substrate connector Between each of the substrates 30 at 35 and each of the semiconductor elements 10 at the wafer 15
0 is formed integrally, and between each connection electrode 31 of the substrate 30 and each pad electrode 11 of the semiconductor element 10, a conductive path element 25 extending through the sealing layer 20 in the thickness direction is provided. The intermediate laminated body 1A fixed and disposed by the sealing layer 20 is formed.

In the above, the conditions for the curing treatment of the sealing composite sheet 26 are appropriately selected according to the type of the curable resin material used. For example, when the curable resin material is a thermosetting epoxy resin, the heating temperature is 120.
~ 150 ° C, the heating time is 0.5 ~ 2.0 hours,
When the curable resin material is a thermosetting polyimide resin material, the heating temperature is 200 to 350 ° C., the heating time is 0.5 to 2.0 hours, and the curable resin material is thermosetting. In the case of the phenolic resin material, the heating temperature is 120 to 150 ° C., and the heating time is 1.0 to 2.0 hours.

Then, after performing a required inspection on the intermediate laminated body 1A, a die sink is performed along the street of the wafer 15 and cut to obtain a semiconductor device having a configuration as shown in FIG. Can be

According to the above semiconductor device, the semiconductor element 1
0 is packaged by being integrally provided on a substrate 30 of substantially the same size via the sealing layer 20, so that a size equivalent to that of the semiconductor element 10 is obtained. Moreover, the sealing layer 20 is formed of the semiconductor element 1
Since the pad electrode 11 at 0 may be provided only on one surface on which the pad electrode 11 is formed, the packaging of the semiconductor element 10 and the electrical inspection of the obtained semiconductor device can be performed in a wafer state. 20, a conductive path element 25 extending through the thickness direction is integrally provided in a state arranged on the pad electrode 11 of the semiconductor element 10. Since the electrical connection between the connection electrode 11 and the connection electrode 31 of the substrate 30 is achieved, it is not necessary to perform a bonding step in addition to the step of forming the sealing layer 20, and as a result, it is possible to easily manufacture the device at low cost. it can.

Further, since each of the adjacent conductive path elements 25 is insulated from each other by the sealing layer 20, even when the arrangement pitch of the pad electrodes 11 of the semiconductor element 10 is extremely small, the semiconductor element 10 The required electrical connection between the substrate and the substrate 30 can be reliably achieved.

Further, by using an elastic material as the polymer material constituting the conductive path element 25, the semiconductor element 1 can be used in the case where the thermal history due to the temperature change is received.
0, even if a considerably large stress acts on the conductive path element 25 due to the difference in the thermal expansion coefficients of the constituent materials of the sealing layer 20 and the substrate 30, the conductive path element 25 is acted on by it. It is not damaged because it is deformed according to the magnitude of the stress. Therefore, even when an environment changes such as a heat history due to a temperature change, good electrical connection between the pad electrode 11 of the semiconductor element 10 and the connection electrode 31 of the substrate 30 can be stably maintained.

The present invention is not limited to the above-described embodiment, and for example, the following various changes can be made. (1) The formation of the sealing layer can also be performed on the individual semiconductor elements 10 and the substrate 30 which are made into chips. However, since a sealing layer can be formed at once between the plurality of semiconductor elements 10 and the corresponding substrate 30, the wafer 15 on which the plurality of semiconductor elements 10 are formed and the plurality of substrates 30 Is preferably used.

(2) In the formation of the sealing layer in the first and second embodiments and the formation of the conductive path element 25 in the third embodiment, the material layer for the sealing layer or the conductive path As means for applying a parallel magnetic field to the element material layer, a permanent magnet can be used instead of an electromagnet. As such a permanent magnet, Alnico (Fe-Al-N) is preferable in that a parallel magnetic field strength within the above range is obtained.
(i-Co alloy), ferrite and the like are preferable.

(3) In the first embodiment and the second embodiment, as shown in FIG. 21A, half dicing is performed along the streets of the wafer 15 on which the plurality of semiconductor elements 10 are formed. This forms a kerf 16 between adjacent semiconductor elements 10 on the wafer 15, and thereafter, as shown in FIG.
The sealing layer material layer 20 </ b> A can be formed between the wafer 5 and the wafer 15. According to such a method, since the sealing layer 20 is also formed on the peripheral portion on one surface of the semiconductor element 10, the sealing layer 20 is securely held by the semiconductor element 10,
As a result, environmental resistance after mounting is good and high reliability is obtained.

(4) In the second embodiment, before forming the sealing layer material layer 20A, the surface of one or both of the pad electrode 11 of the semiconductor element 10 and the connection electrode 31 of the substrate 30 is formed. For example, a ferromagnetic layer such as nickel can be formed. According to such a method,
Since a parallel magnetic field is applied to the conductive portion forming portion 21A in the sealing layer material layer 20A via the magnetic layer, it is not necessary to use one or both of the pole plates 40 and 41. As a result, Thus, the manufacturing cost can be reduced. Further, since the ferromagnetic layer is in contact with the sealing layer material layer 20A, the sealing layer material layer 20A
In the thickness direction of the conductive portion forming portion 21A, a stronger parallel magnetic field is applied than the other portions, so that the conductive portions 21 insulated from each other can be reliably formed.

[0061]

According to the semiconductor device of the first to third aspects, the semiconductor element is integrally provided on the substrate having substantially the same size as the semiconductor element with the sealing layer interposed therebetween. Therefore, the same size as that of the semiconductor element can be obtained. Moreover, since the sealing layer only needs to be provided on one surface of the semiconductor element on which the pad electrode is formed, packaging of the semiconductor element and electrical inspection of the obtained semiconductor device can be performed in a wafer state. . In addition, the sealing layer is formed with a conductive path extending in the thickness direction of the conductive particles or a conductive portion formed by densely filling the conductive particles, or a conductive material including the conductive particles in a polymer substance. Circuit element is provided, and thereby, electrical connection between the pad electrode of the semiconductor element and the connection electrode formed on one surface of the substrate is achieved. Therefore, a bonding step is performed in addition to the sealing layer forming step. It becomes unnecessary. As a result, it can be easily manufactured at low cost.

According to the semiconductor device of the second aspect, the sealing layer insulates the plurality of conductive portions, which are densely filled with conductive particles and extends in the thickness direction, from each other. Since the conductive portion is formed so as to correspond to the pad electrode of the semiconductor element, even if the arrangement pitch of the pad electrodes of the semiconductor element is extremely small, the conductive section is formed of an insulating portion. Required electrical connection can be reliably achieved.

According to the semiconductor device of the third aspect, the sealing layer contains conductive particles in the polymer substance between each of the connection electrodes of the substrate and each of the pad electrodes of the semiconductor element. Since the included conductive path element is provided, even when the arrangement pitch of the pad electrodes of the semiconductor element is extremely small, it is possible to reliably achieve the required electrical connection between the semiconductor element and the substrate. Can be.

According to the semiconductor device of the fourth aspect, since the polymer material constituting the conductive path element has elasticity, when a thermal history due to a temperature change is received,
Due to the difference in the thermal expansion coefficients of the constituent materials of the semiconductor element, the sealing layer, and the substrate, even if a considerably large stress acts on the conductive path element, the conductive path element is not affected by the stress applied thereto. It is not damaged because it is deformed according to its size.
Therefore, good electrical connection between the pad electrode of the semiconductor element and the connection electrode of the substrate can be stably maintained even with a change in environment such as a heat history due to a temperature change.

According to the semiconductor device of the fifth aspect, the semiconductor elements are in a wafer state, and the substrate is provided integrally with each of the semiconductor elements in the wafer via the sealing layer. The packaging of the elements and the electrical inspection of the obtained semiconductor device can be performed collectively in the state of a wafer, and as a result, it can be manufactured at a lower cost.

According to the method of manufacturing a semiconductor device according to the sixth to ninth aspects, a semiconductor device having the same size as a semiconductor element to be mounted can be easily and reliably manufactured at low cost.

According to the method of manufacturing a semiconductor device according to the seventh or eighth aspect, even when the arrangement pitch of the pad electrodes of the semiconductor element to be mounted is extremely small,
The required electrical connection between the semiconductor element and the substrate can be reliably achieved.

According to the method of manufacturing a semiconductor device according to the ninth aspect, since a wafer on which a plurality of semiconductor elements are formed and a substrate connecting body formed by connecting a plurality of substrates are used, the packaging of the semiconductor element and Since the electrical inspection of the obtained semiconductor device can be performed collectively in the state of the wafer, the semiconductor device can be manufactured at a lower cost.

[Brief description of the drawings]

FIG. 1 is an explanatory cross-sectional view schematically showing a configuration of a semiconductor device according to a first embodiment.

FIG. 2 is an explanatory sectional view showing a part of the semiconductor device shown in FIG. 1 in an enlarged manner.

FIG. 3 is an explanatory view showing a wafer on which a plurality of semiconductor elements are formed.

FIG. 4 is an explanatory cross-sectional view showing a board connected body in which a plurality of boards are integrally connected.

FIG. 5 is an explanatory diagram showing a state in which a sealing layer material layer is formed between a wafer and a substrate connector to form an intermediate laminate.

FIG. 6 is an explanatory view showing a state in which a parallel magnetic field is applied to the sealing layer material layer in the intermediate laminate in the first embodiment.

FIG. 7 is an explanatory diagram showing a state in which a sealing layer is formed on the intermediate laminate in the first embodiment.

FIG. 8 is an explanatory cross-sectional view schematically showing a configuration of a semiconductor device according to a second embodiment.

9 is an explanatory cross-sectional view showing a part of the semiconductor device shown in FIG. 8 in an enlarged manner.

FIG. 10 is an explanatory view showing a state in which a parallel magnetic field is applied to a sealing layer material layer in an intermediate laminate in the second embodiment.

FIG. 11 is an explanatory diagram showing a state in which a sealing layer is formed on an intermediate laminate in the second embodiment.

FIG. 12 is an explanatory cross-sectional view schematically showing a configuration of a semiconductor device according to a third embodiment.

13 is an explanatory sectional view showing a part of the semiconductor device shown in FIG. 12 in an enlarged manner.

FIG. 14 is an explanatory cross-sectional view illustrating a configuration of an example of a composite sheet for sealing.

FIG. 15 is an explanatory cross-sectional view showing a laminated material in which thin metal layers are formed on both surfaces of a resin sheet body.

FIG. 16 is an explanatory cross-sectional view showing a state where holes are formed in the laminated material shown in FIG. 16;

FIG. 17 is an explanatory sectional view showing a state in which a material layer for a conductive path element is formed in a hole of a laminated material.

FIG. 18 is an explanatory cross-sectional view showing a state where a conductive path element is formed in a hole of a laminated material.

FIG. 19 is an explanatory view showing a state in which a parallel magnetic field is applied to the conductive path element material layer.

FIG. 20 is an explanatory cross-sectional view showing a step of thermocompression bonding a sealing composite sheet between a substrate and a wafer.

FIG. 21A is a cross-sectional view illustrating a state in which half dicing has been performed on a wafer, and FIG. 21C is a sealing layer material layer between a substrate connected body and the half-diced wafer. FIG. 4 is an explanatory cross-sectional view showing a state in which is formed.

FIG. 22 is an explanatory cross-sectional view illustrating a configuration of an example of a conventional semiconductor device.

FIG. 23 is an explanatory view showing a step of mounting a conventional semiconductor device on a wiring board.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor device 1 Intermediate laminated body 10 Semiconductor element 11 Pad electrode 15 Wafer 16 Notch 20 Sealing layer 20A Sealing layer material layer 21 Conductive part 21A Conductive part forming part 22 Insulating part 25 Conductive path element 25A Conductive path element material Layer 25H Through-hole 26 Sealing composite sheet 26A Laminated material 26H Hole 27 Resin sheet 28,29 Thin metal layer 28K, 29K Opening 30 Substrate 31 Connection electrode 32 Wiring section 33 Short-circuit section 35 Substrate connector 36,37 Electromagnet 40 , 41 Magnetic pole plate S Thermosetting resin R Conductive particle T Polymer substance M Ferromagnetic part N Non-magnetic part 80 Semiconductor device 81 Semiconductor element 82 Pad electrode 83 Wire 85 Substrate 86 Projecting electrode 87 Wiring part 88 Sealing Part 90 wiring board 91 terminal electrode 95 adhesive layer

Claims (9)

[Claims] 1. A semiconductor device comprising: a substrate; and a semiconductor element integrally provided on one surface of the substrate via a sealing layer and having a plurality of pad electrodes on a surface in contact with the sealing layer. The substrate has substantially the same size as the semiconductor element, and has a plurality of connection electrodes arranged on one surface corresponding to each of the pad electrodes of the semiconductor element, and the sealing layer The curable resin contains conductive particles, and the conductive particles are dispersed in a state of being oriented in the thickness direction of the sealing layer. The conductive particles formed by the conductive particles in the sealing layer A semiconductor device, wherein each of the pad electrodes of the semiconductor element is electrically connected to each of the connection electrodes of the substrate via a path. 2. A semiconductor device comprising: a substrate; and a semiconductor element integrally provided on one surface of the substrate via a sealing layer and having a plurality of pad electrodes on a surface in contact with the sealing layer. The substrate has substantially the same size as the semiconductor element, and has a plurality of connection electrodes disposed on one surface corresponding to each of the pad electrodes of the semiconductor element; The conductive particles are contained in the curable resin, the conductive particles are densely packed, and a plurality of conductive portions extending in the thickness direction, and an insulating portion that insulates these conductive portions from each other. Each of the conductive portions is disposed between each of the connection electrodes of the substrate and each of the pad electrodes of the semiconductor element, and via the conductive portion, of the pad electrode of the semiconductor element. Each is electrically connected to each of the connection electrodes of the substrate. A semiconductor device characterized in that: 3. A semiconductor element having a substrate and a plurality of pad electrodes provided on one surface of the substrate with a sealing layer made of a curable resin material interposed therebetween, the surface being in contact with the sealing layer. And a plurality of conductive path elements, each of which is provided integrally with the sealing layer so as to extend through the sealing layer in a thickness direction thereof, and the conductive particles are contained in a polymer substance. Has substantially the same size as the semiconductor element, has a plurality of connection electrodes arranged on one surface corresponding to each of the pad electrodes of the semiconductor element, and each of the conductive path elements Disposed between each of the connection electrodes of the substrate and each of the pad electrodes of the semiconductor element,
A semiconductor device, wherein each of the pad electrodes of the semiconductor element is electrically connected to each of the connection electrodes of the substrate via the conductive path element. 4. The semiconductor device according to claim 3, wherein the polymer material forming the conductive path element has elasticity. 5. The semiconductor device according to claim 1, wherein the semiconductor elements are in a wafer state, and each of the semiconductor elements in the wafer is provided integrally with the substrate via a sealing layer.
The semiconductor device according to claim 4. 6. The method for manufacturing a semiconductor device according to claim 1, wherein a conductive particle exhibiting magnetism is dispersed in a liquid curable resin material on one surface of a substrate. Through the material layer,
The semiconductor element is arranged such that one surface on which the pad electrode is formed is in contact with the sealing layer material layer, and a magnetic field is applied to the sealing layer material layer in a thickness direction thereof, whereby the conductive particles are formed. By orienting the sealing layer material layer in the thickness direction of the sealing layer material layer, and curing the sealing layer material layer in this state, thereby forming a sealing layer between the substrate and the semiconductor element. A method for manufacturing a semiconductor device, comprising: 7. The method for manufacturing a semiconductor device according to claim 2, wherein a conductive particle exhibiting magnetism is dispersed in a liquid curable resin material on one surface of a substrate. Through the material layer,
The semiconductor element is arranged such that one surface on which the pad electrode is formed is in contact with the sealing layer material layer. By applying a magnetic field, the conductive particles are aggregated in a portion located on the pad electrode and oriented in the thickness direction, and in this state, the sealing layer material layer is cured to form the substrate and the substrate. A method of manufacturing a semiconductor device, comprising a step of forming a sealing layer between the semiconductor device and the semiconductor element. 8. The method of manufacturing a semiconductor device according to claim 3, wherein a through-hole is formed in accordance with a pattern corresponding to a pad electrode of the semiconductor element, and the resin sheet is made of a semi-cured curable resin. And a sealing composite sheet having a conductive path element in which conductive particles are contained in a polymer substance, which is provided in a through hole of the resin sheet body, is provided on one surface of the substrate, The semiconductor element is arranged via the sealing composite sheet so that the pad electrode is in contact with the conductive path element of the sealing composite sheet, and curing is performed in this state, so that the semiconductor element is disposed between the substrate and the semiconductor element. Forming a sealing layer on the semiconductor device. 9. The method according to claim 1, further comprising using a wafer on which a plurality of semiconductor elements are formed, and a substrate connected body obtained by integrally connecting a plurality of substrates arranged in correspondence with each of the semiconductor elements on the wafer. 9. The method of manufacturing a semiconductor device according to claim 6, wherein a sealing layer is formed between each of the semiconductor elements in the above and each of the substrates in the substrate connected body.