JP2000250512A - Display device and image data synthesizing method - Google Patents

Abstract

(57) [Summary] [Problem] To accurately combine and display a plurality of different images. SOLUTION: After matching the data structures of a plurality of different types of image data, these image data are combined and displayed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device for superimposing and displaying a plurality of images on a display such as a television screen, and a method for synthesizing the image data.

[0002]

2. Description of the Related Art In recent years, with the enhancement and improvement of functions of display devices such as televisions, it has become possible to display a plurality of images superimposed on one display. For example, information such as a brightness adjustment value, a brightness adjustment value, and a color adjustment value is displayed as an indicator on a part of a television screen. Data superimposed and displayed on the main image in this manner is generally called OSD (on-screen display) data.

When a main image (hereinafter, referred to as an "actual image") is displayed on a television set or the like, the original image data is latched by two pixels at a time for display (output) for the purpose of speeding up processing. Image signal to the device. In such a case, the actual image and OS
In order to match the processing speed of the D image, two
The same OSD data is combined with the actual image data of the pixel.

[0004]

For this reason, the OSD image actually projected on the display is delayed with respect to the expected state (original state). Such a phenomenon is not limited to an actual image and OSD data, but can occur when two different images are combined.

The present invention has been made in view of the above situation, and has as its first object to provide a display device capable of precisely combining and displaying two different images.

Another object of the present invention is to provide a control method capable of precisely combining and displaying two different images.

[0007]

In order to solve the above problems, a display device according to a first aspect of the present invention comprises: first image data generating means for generating first image data; Second image data generating means for generating second image data different from the image data; image synthesizing means for synthesizing the first and second image data; first and second input to the image synthesizing means Data structure adjusting means for matching the structure of image data; and display means for displaying an image synthesized by the image synthesizing means.

As described above, in the display device according to the present invention, the structures of the first and second image data are matched, so that one image is changed depending on the number of pixels processed in one clock. There will be no delay. That is, the first and second image data can be made to correspond one-to-one (one pixel to one pixel), and a plurality of different images can be displayed in a superimposed manner.

In the display device of the present invention described above, when an OSD image is combined with a main image, it is desirable that the data structure of the OSD data be matched with the main image and that the OSD data be temporarily stored in the line memory. After that, the image is combined with the main image. As a result, the OSD actually displayed
The position of the image can be arbitrarily and easily adjusted.

In the image synthesizing method according to the second aspect of the present invention, prior to synthesizing the image data, the data structures of the plurality of image data are matched.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to examples. The embodiment described below employs a so-called O on a main image displayed on a display such as a television.
The technical idea of the present invention is applied to a device for superimposing an SD (On Screen Display) image. The present invention is not limited to OSD images, and can be applied to various types of display devices that display a plurality of different images in a superimposed manner.

[0012]

FIG. 1 shows the configuration of a display device 10 according to a first embodiment of the present invention. Display device 10
Is a real image data generating unit 12 for generating real image data (main image data), and an A / D converter (analog / analog).
Digital converter) 14 and O which generates OSD data.
An SD data generating circuit 16, an image synthesizing unit (resolution converting LSI) 20 for synthesizing an actual image and an OSD image,
CPU (Central Processing Unit) 1 that controls the SD data generation circuit 16 and the image synthesis unit (resolution conversion LSI) 20
8, an oscillator 22 for generating a clock signal, an image memory (frame memory) 24 for storing one screen of actual image data, and a display 26 for displaying synthesized image data. Also, if the image synchronization signal is OSD
The data is supplied to the data generation circuit 16.

As the real image data generating unit 12, a video camera or the like can be used. The image data output from the real image data generation unit 12 is data that is mainly displayed on the display 26. A / D converter 1
Reference numeral 4 converts analog data output from the real image data generation unit 12 into digital data. When the real image data generating unit 12 directly generates image data in digital format, the A / D converter 14 can be omitted.

The OSD data generation circuit 16 generates OSD data to be displayed on the actual image. As OSD data, for example, “brightness adjustment”, “brightness adjustment”,
There are data for screen adjustment such as “color adjustment” and data for function adjustment and determination of the image display device such as “channel selection” and “channel storage”. With the recent enhancement of television functions, it has become possible to adjust the brightness of the television with a remote controller or the like while watching television, and at that time, OSD data is partially displayed on the screen as an indicator. Of course, not only televisions but also general image display devices need to control brightness and brightness, and the OSD is used as an indicator for displaying them.

The oscillator 22 supplies a clock signal to the image synthesizing unit 20 and the OSD generation circuit 16.
As the display (display unit) 26, a CRT, a liquid crystal monitor, a projector, a PDP (plasma display)
Etc. are available.

The image synthesizing unit 20 includes an actual image data buffer 28 connected to the output terminal of the A / D converter 14; an OSD data buffer 30 connected to the output terminal of the OSD data generation circuit 16; 24,
It includes an actual image data buffer 28, an OSD data buffer 30, an oscillator 22, and an image memory controller connected to the display 26.

The real image data buffer 28 is a latch circuit 36 for temporarily holding the real image data supplied from the real image data generator 12 via the A / D converter 14.
(See FIG. 2). This latch circuit (36)
Is a so-called two-pixel latch that latches an actual image in two pixels at a time. The image memory 24 holds one screen of real image data supplied from the real image data buffer 28 via the image memory controller 32. In order to process real image data in parallel with two pixels, it is not always necessary to use a two-pixel latch. For example, two pixels can be processed by setting the A / D converter 14.

The OSD data buffer 30 includes a latch circuit 38 (see FIG. 2) for temporarily holding digital OSD data supplied from the OSD data generator 16. This latch circuit (38) is a so-called two-pixel latch that latches the OSD data in parallel for every two pixels, similarly to the buffer 28 for the real image data. That is, by using the same type of latch circuit as the real image data buffer 28, the data structures of the real image data and the OSD data are matched.

The image memory controller 32 includes the oscillator 2
The real image data and the OSD data are synthesized at a timing based on the clock signal supplied from the second and the third clocks. That is, OS
The OSD data supplied from the D data buffer 30 and the actual image data supplied from the image memory 24 are combined, and the combined data is supplied to the display 26.
The display 26 displays the OSD image on the actual image based on the data supplied from the image memory controller 32.

Here, both the actual image data and the OSD data supplied to the image memory controller 32 have a data structure in which two pixels are arranged in parallel. Therefore, it is possible to make a one-to-one correspondence even when both are combined, and it is possible to perform precise image combination.

Next, the operation of the first embodiment of the present invention configured as described above will be described with reference to FIGS. The real image data in digital format supplied from the real image data generation unit 12 via the A / D converter 14 is supplied to the latch circuit 36 in the real image data buffer 28 every two pixels as shown in the upper part of FIG. It is held sequentially and in parallel. On the other hand, as shown in the lower part of FIG. 2, the OSD data supplied from the OSD data generation circuit 16 is supplied to the OSD data buffer 30 as in the case of the real image data.
The two latches are sequentially held in parallel by the middle latch circuit 38.

In the present invention, the actual image and the OS
The data structure of the D image is not limited to the two-pixel parallel structure, and can correspond to various formats. That is, the gist of the present invention is to match the data formats of the actual image and the OSD image.

The real image data held in the real image data buffer 28 (36) is transferred to the image memory controller 32.
Is written into the image memory 24 for one screen. Thereafter, as shown in FIG. 3, the OSD data supplied from the OSD data buffer 30 is combined with the actual image data read from the image memory 24 by the image memory controller 32 and displayed on a part of the display 26. You.

As described above, in the present embodiment, the actual image data and the OSD data supplied to the image memory controller 32 both have a data structure in which two pixels are arranged in parallel. When you do 1
It is possible to make a one-to-one correspondence, and it is possible to perform precise image synthesis.

Next, a display device and an image synthesizing method according to a second embodiment of the present invention will be described. The basic configuration of the display device of the second embodiment is the same as that of the first embodiment shown in FIG. In this embodiment, the OSD
The data buffer 30 includes a line memory (bank) 40 in addition to the two-pixel latch circuit 38.

As shown in FIG. 4, the OSD data supplied from the OSD data generation circuit 16 is latched in two pixels in parallel by the latch circuit 36, and at the same time, the line memory 4 is latched.
0 holds data for one horizontal line. That is, if data is latched in the order of A and B in the latch circuit 38, data of both A and B are written to the line memory 40 at the same time as B is latched. Similarly, in the case of OSD data C and D, both data C and D are written to the line memory 40 at the same time when the data D is latched. In this way, if one line of OSD data (for example, an address from 0 to 255 is one line),
56 × 2 (pixel) data can be stored in the line memory 40.

The line memory 40 is a so-called dual port memory having separate input (writing) and output (reading) terminals. The line memory 40 writes data into the memory and writes data from the memory. It is configured so that reading can be performed simultaneously. In other words, it is possible to operate with first-in first-out (reading out the data written first in order).

The OSD data written in the line memory 40 is read out at a predetermined timing and is synthesized with the actual image data read out from the image memory 24. The image data synthesized in this way is displayed on the display 26.

Next, a display device and an image synthesizing method according to a third embodiment of the present invention will be described. The basic configuration of the display device of the third embodiment is the same as that of the first embodiment shown in FIG. In this embodiment, the OSD
The data buffer 30 includes two line memories (42a and 42b) in addition to the two-pixel latch circuit 38.

That is, as shown in FIG. 5, after the OSD data supplied from the OSD data generating circuit 16 is latched in parallel by two pixels in the latch circuit 36, one horizontal line is alternately written into the line memories 42a and 42b. .
These line memories 42a and 42b are so-called dual-port memories, and are configured so that writing of data to the memory and reading of data from the memory can be performed in parallel.

In this embodiment, for example, after first writing the OSD data A ', B', C ',... To the line memory 42b, the next OSD data A, B, C,. Write sequentially. When writing the OSD data to the line memory 42a,
The OSD data is read from the line memory 42b at a desired timing. That is, the line memories 42a and 42b
And writing and reading of OSD data are performed alternately.

The switching between the line memories 42a and 42b can be realized by setting the most significant bits to different bits "0" or "1" in advance, and inverting the most significant bits simultaneously with reading. Thereby, duplication of data can be prevented. That is, the write position and the read position of the data in the line memories 42a and 42b do not overlap. As a result, an OSD image can be displayed at an arbitrary position on the display 26.

The OSD data written in the line memories 42a and 42b is read out at a predetermined timing,
The image data is combined with the actual image data read from the image memory 24 and displayed on the display 26.

As shown in FIG. 6, in this embodiment,
When the level of the OSD data enable signal output from the OSD data generation circuit 16 changes from high to low, the OSD data is written to one of the line memories (42a or 42b) and at the same time the other line memory (42
a or 42b). Thereafter, the actual image data and the OSD data held in the image memory 24 are combined at an arbitrary timing and displayed on the display 26. FIG. 7 shows a state displayed on the display 26.

As described above, in this embodiment, the display position of the OSD image on the display 26 can be freely set by adjusting the timing of reading the OSD data from the line memories (42a, 42b).

[0036]

As described above, according to the present invention,
Since the image data is combined after the structures of the different types of image data are matched, one image is not prolonged due to the difference in the number of pixels processed in one clock.
That is, a plurality of different pieces of image data can be made to correspond one-to-one (one pixel to one pixel), and can be displayed with being superimposed precisely.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a display device according to the present invention.

FIG. 2 is an explanatory diagram showing the operation of the display device and the image synthesizing method according to the first embodiment of the present invention.

FIG. 3 is an explanatory diagram illustrating an operation of the display device and the image combining method according to the first embodiment.

FIG. 4 is an explanatory diagram showing an operation of a display device and an image synthesizing method according to a second embodiment of the present invention.

FIG. 5 is an explanatory diagram showing an operation of a display device and an image synthesizing method according to a third embodiment of the present invention.

FIG. 6 is an explanatory diagram illustrating an operation of a display device and an image combining method according to a third embodiment.

FIG. 7 is an explanatory diagram illustrating the operation of the display device and the image combining method according to the third embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Display apparatus 12 Real image data generation part 16 OSD data generation circuit 20 Image synthesis unit (resolution conversion LSI) 26 Display 28 Buffer for real image data 30 Buffer for OSD data 32 Image memory controller 36, 38 Latch circuit (2-pixel latch) 40, 42a, 42b Line memory (bank)

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H04N 5/445 G06F 15/66 450 5/45 G09G 5/36 520M F-term (Reference) 5B057 AA01 CA01 CA02 CA16 CB01 CB02 CB16 CC03 CE08 5C023 AA18 BA09 CA01 CA08 DA04 DA08 EA02 EA15 5C025 AA28 BA28 CA06 CA10 CA11 CB08 CB09 CB10 DA08 5C082 AA02 BA02 BA12 BA41 BB32 CA56 CA62 DA51 MM10

Claims (11)

[Claims] 1. A display device for displaying a plurality of images superimposed on each other, comprising: first image data generating means for generating first image data; and generating second image data different from the first image data. Second image data generating means for performing the processing; image synthesizing means for synthesizing the first and second image data; data for matching the structures of the first and second image data input to the image synthesizing means A display device comprising: structural matching means; and display means for displaying an image synthesized by the image synthesizing means. 2. The data structure matching means includes first and second image data for temporarily storing the first and second image data, respectively.
2. The display device according to claim 1, further comprising a data holding unit, wherein each of the first and second data holding units is configured to hold the same number of pixel data in parallel. . 3. The data structure matching means includes a line memory for holding one line of data of the display means with respect to at least one of the first and second image data; The display device according to claim 2, wherein the display device has a dual-port structure capable of writing data output from the device and reading data stored therein at the same time. 4. The data structure matching means includes two line memories, and alternately writes data output from the data holding means to these line memories and writes data to one of the line memories. 4. The display device according to claim 3, wherein data is read from the other line memory during the reading. 5. A display device for displaying an OSD (on-screen display) image superimposed on a main image, comprising: main image data generating means for generating main image data constituting the main image; OSD data generating means for generating OSD data to be constituted; data structure matching means for matching the structure of the OSD data input to the image combining means with the structure of the main image data; A display device comprising: display means for displaying an image. 6. A first data structure matching means for temporarily storing the main image data and OSD data, respectively.
And a second data holding unit, wherein each of the first and second data holding units is configured to hold the same number of pixel data in parallel. Display device. 7. The data structure matching means includes a line memory for holding one line of data of the display means for the OSD data; the line memory writes data output from the data holding means at the same time as writing the data output from the data holding means. ,
7. The display device according to claim 6, wherein the display device has a dual port structure from which data stored therein can be read. 8. The data structure matching means includes two line memories, and alternately writes data output from the data holding means to these line memories and writes data to one of the line memories. 8. The display device according to claim 7, wherein data is read from the other line memory during the reading. 9. A method of synthesizing a plurality of image data superimposed and displayed on a display, wherein a data structure of the plurality of image data is matched prior to synthesizing the image data. Synthesis method. 10. One of the plurality of image data is main image data forming a main image, and the other one is an OSD (On Screen Display) image forming an OSD (On Screen Display) image displayed on the main image. 10. The method according to claim 9, wherein a structure of the OSD data is matched with a structure of the main image data. 11. The main image data and OSD data are synthesized at a timing based on a predetermined clock signal; prior to the synthesizing process, the number of pixels processed by one clock of the OSD data is determined by one clock of the main image data. The method according to claim 10, wherein the number of pixels is matched with the number of pixels to be processed.