JP2000284875A - Mobile communication equipment - Google Patents

Abstract

(57) Abstract: A peak current generated at a transient timing of a selection control signal for connecting an external device to a processor by a bus is reduced. A plurality of external devices (20 to 22) and a bus (2)
In the mobile communication device having the processor 19 connected by the control unit 3, at least one output of one selection control signal CS and another selection control signal CS ′ is controlled by the timing control unit 24 so that one selection control signal CS ′ is output. The ON / OFF timing of the control signal and another selection control signal (that is, transition timing of rising and falling) does not overlap. This prevents peak currents generated at the transient timing from occurring at the same time, thereby preventing an excessive peak current from being generated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mobile communication device such as a portable telephone or a pager, and more particularly, to a CPU, an MPU, a CPU for controlling communication and data processing with various devices provided in the mobile communication device. The present invention relates to bus connection control with a processor such as a DSP.

[0002]

2. Description of the Related Art In recent years, information communication and information processing performance of mobile communication devices such as pagers and mobile phones have been dramatically improved, and the amount of information to be wirelessly communicated has been dramatically increased. In accordance with such a situation, such a mobile communication device includes R
Internal or external memory such as SRAM or flash memory in addition to internal memory such as AM to increase the storage capacity of programs and data, and user interface function by internal or external display such as LCD In addition, there is a demand that the information communication terminal be connected to an information processing device such as a personal computer to function as an information communication terminal.

A mobile communication device having various devices built in or externally mounted as described above generally employs a method of connecting these devices to a processor built in the mobile communication device via a bus. It has been studied that a processor selects a device connected to a bus and performs control and information processing using a selection control signal called a chip select (CS).

[0004]

However, in a mobile communication device adopting the above bus connection method, when a certain device and another device are alternately and continuously selected, these devices are turned on. There is a problem that the peak current of the current and the OFF current becomes extremely high. In addition, such a situation can be said about mobile communication devices in general,
This is particularly remarkable in a pager receiver in which the internal memory and the external memory, or the external memory and the LCD driver of the display means are frequently selected alternately and continuously.

The situation where the peak current becomes extremely high as described above will be specifically described with reference to FIG. FIG. 6 shows a selection control signal (CS1) for selecting a certain device (referred to as device 1), a selection control signal (CS2) for selecting another device (referred to as device 2), and a selection control signal (CS1). Peak current (I1) generated at the fall (ON timing) and the rise (OFF timing),
Peak current (I2) generated at the rise (OFF timing) and fall (ON timing) of the selection control signal (CS2), and the sum of these peak currents (I1 + I
The timing relationship of 2) is shown.

As can be seen from FIG. 1, at point A, the peak of the ON current of device 1 and the peak of the OFF current of device 2 overlap, and at point B, the peak of the OFF current of device 1 and the peak of the ON current of device 2 overlap. However, the current flowed about twice or more than when each device operated alone. When the selection control signal (CS) falls (that is, when a device is selected), an ON current flows until the operation of the device is completed, and the selection control signal (C
When S) rises, an OFF current flows until the device shifts to the standby state.

[0007] When such an excessive peak current is generated, there is a problem that noise is generated due to this and a problem occurs in wireless communication. In addition, it is necessary to provide a shield plate as a countermeasure against such noise, and this has been a major obstacle in reducing the size and weight of a mobile communication device that is required to improve portability. Furthermore, the power supply voltage instantaneously drops due to the excessive peak current, and the low voltage alarm function provided in the mobile communication device may be activated or the processor may run away. Furthermore, in a mobile communication device, it is advantageous to use an air battery as an operating power source for miniaturization and weight reduction. However, since an excessive peak current is generated, a large load current such as an air battery is generated. This has been a major obstacle to adopting batteries that cannot flow electricity.

[0008] The present invention has been made in view of the above-mentioned conventional circumstances, and has as its object to provide a mobile communication device that prevents the occurrence of the excessive peak current as described above. Further objects of the present invention will be apparent in the following description.

[0009]

According to the present invention, a selection control signal for bus-connecting one device to a processor and a selection control signal for bus-connecting another device to a processor are turned on.
The occurrence of the excessive peak current as described above is prevented by preventing the timing (the falling timing of CS in the above description) and the OFF timing (the rising timing of CS in the above description) from overlapping.

More specifically, according to the present invention, in a mobile communication device having a processor and a processor connected to a plurality of devices by a bus, a selection control signal for connecting one device to the processor and another device The output of at least one of a selection control signal for bus connection to a processor is controlled by a timing control means to turn on a selection control signal of one device and a selection control signal of another device.
/ OFF timing (that is, transition timing of rising and falling) is prevented from overlapping. Furthermore,
In the present invention, the timing control means changes the signal output time of at least one of the selection control signals to generate the other selection control signal, so that the selection control signal of one device and the other device ON / OFF with selection control signal
The OFF timing does not overlap.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described with reference to an embodiment shown in the drawings. FIG. 1 shows an example of a main configuration of a pager to which the present invention is applied. The pager is
A reception detection unit 11 for detecting a signal received from an antenna (not shown), a decoder unit 12 for decoding the detected reception signal, a speaker 13 for notifying the reception of the signal by sound generation,
Vibrator 14 for notifying the reception of the signal by oscillation, and DTMF (Dual Tone Multi F
DTMF signal generating unit 15 for transmitting a signal
A key switch 16 for receiving a user's operation, a driver 17 for driving these devices 13 to 16, an EEP-ROM 18 as an internal memory storing a pager function program and necessary data, and a reception processing control by executing the pager function program (Control unit) 19 for controlling the operation of the driver 17 and the like.

Further, this pager has an external memory 20 composed of a flash memory and an external memory 2 composed of an SRAM in addition to the basic functions as the pager described above.
1. A display unit 22 including an LCD and its driver is provided as an external device, and the selection control signal (CS) output from the processor 19 causes these external devices 20 to
22 is selectively connected to the processor 19 via a bus 23. The pager also has timing control means 24 constituted by the processor 19 executing a predetermined program.
4 controls the output of a selection control signal (CS) for connecting the external devices 20 to 22 to the processor 19 via a bus.

Here, as shown in FIG.
Reference numeral 9 operates at a clock (CLK) timing supplied from an oscillator (not shown), and generates a control signal S1 twice as wide as the clock (CLK) in synchronization with the clock (CLK). As shown in FIG. 2, control signals such as a selection control signal (CS), an output enable signal (OE), a write enable signal (WE), and a read enable signal (RE) are also synchronized with the clock (CLK). Issued. In this example, the control signal S1 is set to 1 by the timing control unit 24 as shown in FIG.
/ 3 clocks (CLK) delayed by three control signals S2, S3, and S4 are generated.
4 and the selection control signal (CS), the selection control signal (C
Another selection control signal (CS ') for selecting an external device different from S) is generated.

In the example shown in FIG. 3, the selection control signal (C
S ′), and shortens the ON current time of the selection control signal (C
The OFF timing (rise timing) of S) and the other selection control signal (CS ') is prevented from overlapping. The other selection control signal (CS ′) whose OFF timing is deviated from the selection control signal (CS) is generated by the timing control unit 24 having a logic circuit configuration as shown in FIG.
It is generated using the control signals S1 to S4 and the selection control signal (CS).

In the example shown in FIG.
4 is an AND circuit 25 to which the control signal S1, the inverted signal of the control signal S2, the inverted signal of the control signal S3, and the control signal S4 are input, the inverted signal of the output signal from the AND circuit 25, and And an AND circuit 26 to which a selection control signal (CS) is inputted. By inverting the output signal of the AND circuit 26, another selection control signal (CS ') as shown in FIG. Has been generated. Therefore,
By selecting one external device by the selection control signal (CS) and connecting it with the bus, and selecting another external device by the other selection control signal (CS ') and connecting the bus, at least the OFF timing of these control signals And the simultaneous occurrence of peak currents generated at the OFF timing can be avoided, and the occurrence of excessive peak currents can be prevented.

As in the above example, by preventing one of the transient timings of the selection control signal (CS) and the other selection control signal (CS ') from being overlapped with each other, the excessive peak current of the present invention can be reduced. Although the occurrence reduction can be achieved, in the present invention, it is preferable that the transition timing of both the selection control signal (CS) and the other selection control signal (CS ′) does not overlap. For example, as shown in FIG.
In response to the control signal (CS), another selection control signal (C
S ′) is generated so as not to overlap at both transient timings, and the peak current I generated at the ON / OFF timing of the control signal (CS) and the ON of the other control signal (CS ′) are generated.
If the peak current I ′ generated at the / OFF timing does not overlap at all, the sum (I +
I ′) can be suppressed to about 比 べ compared to the related art shown in FIG.

By changing the logic circuit configuration of the timing control means 24 in a known manner, the output time of another selection control signal (CS ') can be changed to a longer or shorter time, or another selection control signal (CS') can be changed. CS ′) can be changed. By such output control, the output timing of FIG.
As shown in FIG. 5 and FIG. 5, the selection control signal (C
It is possible to generate another selection control signal (CS ') whose transient timing does not overlap with S). In the above example, the output of one of the selection control signals (CS ′) is controlled. However, in the present invention, both of the selection control signals (CS) (C
The output control of S ′) may be performed to avoid overlapping of the transient timings.

In the above example, another selection control signal is generated from one selection control signal. However, in the present invention, these selection control signals may be generated separately. Further, in the above example, an example in which the present invention is applied to a pager is shown, but the present invention can obtain the same effect even when applied to another mobile communication device such as a mobile phone.

[0019]

As described above, according to the present invention,
Since the ON / OFF timings of a plurality of selection control signals for bus-connecting the device to the processor are not overlapped, peak currents generated at the ON / OFF timings can be reduced, and noise generated due to excessive peak currents can be reduced. , And good communication can be realized, and the size of the mobile communication device can be reduced in size and weight by eliminating the shield plate for noise suppression. Furthermore, by preventing the occurrence of excessive peak current, unnecessary operation of the low-voltage alarm function provided in the mobile communication device is prevented, runaway of the processor is also prevented, and the size and weight of the mobile communication device are reduced. It is also possible to use a battery with a small amount of electric power such as an air battery as the operating power supply for the purpose of realization.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a main part of a pager according to an embodiment of the present invention.

FIG. 2 is a timing chart illustrating control signals issued from a processor.

FIG. 3 is a timing chart illustrating generation of a selection control signal.

FIG. 4 is a diagram illustrating a configuration example of a timing control unit.

FIG. 5 is a timing chart illustrating peak current reduction according to the present invention.

FIG. 6 is a timing chart illustrating generation of an excessive peak current.

[Explanation of symbols]

 19: control unit (processor), 20, 21: external memory, 22: display unit, 23: bus, 24: timing control means,

Claims (2)

[Claims] 1. A mobile communication device having a processor connected to a plurality of devices via a bus, a selection control signal for connecting one device to the processor and a selection control signal for connecting another device to the processor. So that the ON / OFF timing does not overlap with
A mobile communication device comprising timing control means for controlling at least one output of the selection control signals. 2. The mobile communication device according to claim 1, wherein the timing control means changes a signal output time of at least one of the selection control signals to generate the other selection control signal. Characteristic mobile communication device.