JP2000294577A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2000294577A
JP2000294577A JP9932099A JP9932099A JP2000294577A JP 2000294577 A JP2000294577 A JP 2000294577A JP 9932099 A JP9932099 A JP 9932099A JP 9932099 A JP9932099 A JP 9932099A JP 2000294577 A JP2000294577 A JP 2000294577A
Authority
JP
Japan
Prior art keywords
semiconductor element
resin substrate
connection terminal
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9932099A
Other languages
Japanese (ja)
Other versions
JP3661482B2 (en
Inventor
Kazuaki Suzuki
和明 鈴木
Takashi Ando
尚 安藤
孝 ▲松▼村
Takashi Matsumura
Toshiyuki Shudo
俊之 周藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dexerials Corp
Original Assignee
Sony Chemicals Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Chemicals Corp filed Critical Sony Chemicals Corp
Priority to JP09932099A priority Critical patent/JP3661482B2/en
Publication of JP2000294577A publication Critical patent/JP2000294577A/en
Application granted granted Critical
Publication of JP3661482B2 publication Critical patent/JP3661482B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers

Landscapes

  • Credit Cards Or The Like (AREA)
  • Die Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

(57)【要約】 【課題】 厚みが薄く、エッジショートの発生もない半
導体装置を提供する。 【解決手段】 加圧又は加圧加熱により容易に変形しう
る樹脂基板2に保持された半導体素子1を含む半導体装
置において、半導体素子1のダイシング面1aが樹脂基
板2から露出せず且つ半導体素子1の接続端子1dが外
部回路3と接続可能となるように、半導体素子1を加圧
又は加圧加熱することにより樹脂基板2を変形させなが
ら樹脂基板2中に埋設する。
(57) [Problem] To provide a semiconductor device having a small thickness and no occurrence of edge short-circuit. SOLUTION: In a semiconductor device including a semiconductor element 1 held on a resin substrate 2 which can be easily deformed by pressurization or pressurization and heating, a dicing surface 1a of the semiconductor element 1 is not exposed from the resin substrate 2 and the semiconductor element 1 The semiconductor element 1 is buried in the resin substrate 2 while deforming the resin substrate 2 by pressing or heating the semiconductor element 1 so that one connection terminal 1 d can be connected to the external circuit 3.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、加圧又は加圧加熱
により容易に変形しうる樹脂基板に、半導体素子が保持
されている半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a semiconductor element is held on a resin substrate which can be easily deformed by pressing or heating under pressure.

【0002】[0002]

【従来の技術】加圧又は加圧加熱により容易に変形しう
る樹脂基板に半導体素子が保持されている半導体装置の
代表的なものとして、ICカードやICタグ等のデータ
キャリアが挙げられる。
2. Description of the Related Art A typical example of a semiconductor device in which a semiconductor element is held on a resin substrate which can be easily deformed by pressurization or pressurization and heating is a data carrier such as an IC card or an IC tag.

【0003】従来のデータキャリアの代表例であるIC
カードは、図5に示すように、両面銅張ポリイミド基板
の銅層からフォトリソグラフ法によりコンデンサ51と
アンテナコイル52とを形成し、それらの接続ランド
(図示せず)とICチップ53の外部接続バンプ端子
(図示せず)とを異方性導電フィルム(図示せず)を介
して接続した構造を有する。更に、ポリイミド基板から
突出しているICチップを埋め込むに足る厚さの接着剤
層を介して保護フィルムを積層している。また両面銅張
ポリイミド基板の裏面にも接着剤層を介して保護フィル
ムが積層されている。
An IC which is a typical example of a conventional data carrier
In the card, as shown in FIG. 5, a capacitor 51 and an antenna coil 52 are formed by a photolithographic method from a copper layer of a double-sided copper-clad polyimide substrate, and connection lands (not shown) of these and external connection of an IC chip 53 are formed. It has a structure in which bump terminals (not shown) are connected via an anisotropic conductive film (not shown). Further, a protective film is laminated via an adhesive layer having a thickness enough to embed the IC chip protruding from the polyimide substrate. A protective film is also laminated on the back surface of the double-sided copper-clad polyimide substrate via an adhesive layer.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、従来の
ICカード等のデータキャリアは、高価な両面銅張ポリ
イミド基板を利用しているために、製造コストを低減さ
せることが困難であるという問題がある。また、ポリイ
ミド基板の表面に、それから突出しているICチップを
埋め込むに足る厚さの接着剤層を介して保護フィルムを
積層し、且つポリイミド基板の裏面にも接着剤層を介し
て保護フィルムが積層されているために、ICカード等
のデータキャリアの厚みが厚くなり、取り扱い性が低下
するという問題がある。しかも、従来のICカードの場
合、図6に示すように、ポリイミド基板60上の接続端
子61とICチップ62の外部接続バンプ端子63とを
異方性導電フィルム64を介して加熱押圧して接続した
ときに、ICチップ62の露出しているダイシング面6
2a(特に、ダイシングエッジ62b)がポリイミド基
板60上の接続端子61に食い込み、場合によりショー
ト(以下エッジショートと称する)が生じるという問題
がある。
However, the conventional data carrier such as an IC card uses an expensive double-sided copper-clad polyimide substrate, so that it is difficult to reduce the manufacturing cost. . In addition, a protective film is laminated on the surface of the polyimide substrate via an adhesive layer having a thickness sufficient to embed an IC chip protruding from the polyimide substrate, and a protective film is laminated on the back surface of the polyimide substrate via an adhesive layer. Therefore, there is a problem that the thickness of a data carrier such as an IC card is increased, and the handleability is reduced. Moreover, in the case of the conventional IC card, as shown in FIG. 6, the connection terminals 61 on the polyimide substrate 60 and the external connection bump terminals 63 of the IC chip 62 are connected by heating and pressing via the anisotropic conductive film 64. The dicing surface 6 of the IC chip 62 is exposed.
2a (especially, the dicing edge 62b) bites into the connection terminal 61 on the polyimide substrate 60, and there is a problem that a short circuit (hereinafter, referred to as an edge short circuit) may occur.

【0005】本発明は、以上の従来の技術の課題を解決
しようとするものであり、データキャリア(例えば、I
Cカード、ICタグ)等の半導体装置の厚みを厚くする
ことなく、半導体素子(ICチップ)のエッジショート
を生じさせることなく、且つ低コストで製造できる半導
体装置を提供することを目的とする。
An object of the present invention is to solve the above-mentioned problems of the prior art, and to provide a data carrier (for example, I
It is an object of the present invention to provide a semiconductor device that can be manufactured at low cost without increasing the thickness of a semiconductor device such as a C card or an IC tag, without causing an edge short of a semiconductor element (IC chip).

【0006】[0006]

【課題を解決するための手段】本発明者は、ボンディン
グヘッド等の加熱押圧ツールで半導体素子を、加圧又は
加圧加熱することにより、加圧又は加圧加熱により容易
に変形しうる樹脂基板を変形させながらその中に埋設す
ると、半導体素子のダイシング面を露出させず且つ半導
体素子の接続端子を外部回路と接続できることを見出
し、本発明を完成させるに至った。
SUMMARY OF THE INVENTION The present inventor has disclosed a resin substrate which can be easily deformed by pressing or heating by pressing or heating the semiconductor element with a heating / pressing tool such as a bonding head. Embedded in the semiconductor device while deforming it, it was found that the dicing surface of the semiconductor device could not be exposed and the connection terminal of the semiconductor device could be connected to an external circuit, and the present invention was completed.

【0007】即ち、本発明は、加圧又は加圧加熱により
容易に変形しうる樹脂基板に保持された半導体素子を含
む半導体装置において、半導体素子のダイシング面が樹
脂基板から露出せず且つ半導体素子の接続端子が外部回
路と接続可能となるように、半導体素子が樹脂基板中に
埋設されたものであることを特徴とする半導体装置を提
供する。
That is, the present invention relates to a semiconductor device including a semiconductor element held on a resin substrate which can be easily deformed by pressurization or heating under pressure, wherein the dicing surface of the semiconductor element is not exposed from the resin substrate and A semiconductor element embedded in a resin substrate so that the connection terminal can be connected to an external circuit.

【0008】また、この半導体装置の好ましい具体的な
態様として、加圧又は加圧加熱により容易に変形しうる
樹脂基板に保持された半導体素子及びコンデンサと、樹
脂基板の表面に形成され且つ半導体素子及びコンデンサ
と接続しているアンテナコイルとを有するデータキャリ
アにおいて:半導体素子のダイシング面が樹脂基板から
露出せず且つ半導体素子の接続端子が外部回路と接続可
能となるように、半導体素子は樹脂基板中に埋設された
ものであること;コンデンサは樹脂基板中に埋設された
ものであること; 及びアンテナコイルは印刷回路又は
巻線から構成されていることを特徴とするデータキャリ
アを提供する。
[0008] Further, as preferred specific embodiments of the semiconductor device, a semiconductor element and a capacitor held on a resin substrate which can be easily deformed by pressurization or pressurization and heating, and a semiconductor element formed on the surface of the resin substrate and formed And a data carrier having an antenna coil connected to a capacitor: the semiconductor element is mounted on a resin substrate so that the dicing surface of the semiconductor element is not exposed from the resin substrate and the connection terminals of the semiconductor element can be connected to an external circuit. A data carrier, wherein the capacitor is embedded in a resin substrate; and the antenna coil comprises a printed circuit or a winding.

【0009】また、本発明は、樹脂基板表面の所定部位
に、半導体素子をその接続端子面が上を向くように載置
し、半導体素子のダイシング面が樹脂基板表面から露出
せず且つ半導体素子の接続端子が外部回路と接続可能と
なるように、半導体素子を加圧又は加圧加熱することに
より樹脂基板を変形させながら樹脂基板中に半導体素子
を埋設することを特徴とする半導体装置の製造方法を提
供する。
Further, according to the present invention, a semiconductor element is mounted on a predetermined portion of a resin substrate surface such that a connection terminal surface thereof faces upward, and a dicing surface of the semiconductor element is not exposed from the resin substrate surface and the semiconductor element is not exposed. Manufacturing a semiconductor device by embedding a semiconductor element in a resin substrate while deforming the resin substrate by pressing or heating the semiconductor element so that the connection terminal of the semiconductor device can be connected to an external circuit. Provide a way.

【0010】[0010]

【発明の実施の形態】以下、本発明を詳細に説明する。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail.

【0011】図1は、本発明の半導体装置の好ましい例
の断面図である。図1の半導体装置は、ICチップ等の
半導体素子1が、加圧又は加圧加熱により容易に変形し
うる樹脂基板2(例えば、熱可塑性樹脂基板、一部の熱
硬化性樹脂基板、未延伸フィルム等)中に埋め込まれた
構造を有する。ここで、半導体素子1は、そのダイシン
グ面1aが樹脂基板2から露出しないように埋め込まれ
る。特にダイシングエッジ1bが露出することを完全に
防止するために、半導体素子1の周縁部1cも露出しな
いように埋め込むことが好ましい。このように半導体素
子1を樹脂基板2中に埋め込むので、本発明の半導体装
置においては、エッジショートの問題は生じない。
FIG. 1 is a sectional view of a preferred example of a semiconductor device according to the present invention. In the semiconductor device of FIG. 1, a semiconductor element 1 such as an IC chip has a resin substrate 2 (for example, a thermoplastic resin substrate, a part of a thermosetting resin substrate, an unstretched resin substrate) which can be easily deformed by pressurization or pressurization and heating. Film, etc.). Here, the semiconductor element 1 is embedded so that the dicing surface 1 a is not exposed from the resin substrate 2. In particular, in order to completely prevent the dicing edge 1b from being exposed, it is preferable to embed the semiconductor element 1 so that the peripheral portion 1c is not exposed. Since the semiconductor element 1 is embedded in the resin substrate 2 in this manner, the problem of edge short-circuit does not occur in the semiconductor device of the present invention.

【0012】なお、樹脂基板2に埋め込まれた半導体素
子1の接続端子1d(例えばバンプやランド)は、外部
回路3と接続可能となるようにする必要がある。
The connection terminals 1 d (for example, bumps and lands) of the semiconductor element 1 embedded in the resin substrate 2 need to be connectable to the external circuit 3.

【0013】本発明の半導体装置の構造は、樹脂基板2
上の半導体素子1をボンディングヘッド等の加熱押圧手
段でそれ自体を加圧又は加圧加熱しながら樹脂基板2を
変形させ、樹脂基板2中に埋設することにより実現でき
る。
The structure of a semiconductor device according to the present invention
The above-mentioned semiconductor element 1 can be realized by deforming the resin substrate 2 while pressing or heating the semiconductor element 1 itself by a heating and pressing means such as a bonding head and burying the resin substrate 2 in the resin substrate 2.

【0014】本発明の半導体装置においては、図1に示
すように、半導体素子1の接続端子1d側表面と樹脂基
板2の表面とを、略同一平面レベルにすることが好まし
い。これにより、半導体装置をより薄くすることができ
る。また、略同一平面レベルにすると、半導体素子1の
接続端子1d上に、直接、公知の銀ペースト等を用いる
スクリーン印刷等の印刷法で外部回路3として印刷回路
を安価に形成することができる。しかも、異方性導電接
着剤(フィルム)の使用を省略でき、製造コストの削減
を実現できる。
In the semiconductor device of the present invention, as shown in FIG. 1, it is preferable that the surface of the semiconductor element 1 on the side of the connection terminal 1d and the surface of the resin substrate 2 are at substantially the same level. Thereby, the semiconductor device can be made thinner. Further, when the level is substantially the same plane, a printed circuit can be formed at low cost as the external circuit 3 directly on the connection terminal 1d of the semiconductor element 1 by a printing method such as screen printing using a known silver paste or the like. In addition, the use of the anisotropic conductive adhesive (film) can be omitted, and the production cost can be reduced.

【0015】また、必要に応じ、図1に示すように樹脂
基板2の外部回路3面上に接着剤層4を介して保護フィ
ルム5を積層することが好ましい。
If necessary, a protective film 5 is preferably laminated on the external circuit 3 of the resin substrate 2 via an adhesive layer 4 as shown in FIG.

【0016】以上説明した図1の半導体装置において
は、外部回路3を印刷法により形成した例を示したが、
図2(図中、21は絶縁基板、22は外部回路及び23
はバンプ等の接続端子を示している)に示すように、半
導体素子1の接続端子1dと、任意の方法で作製された
外部回路22の接続端子23とを異方性導電接着剤24
を介して接続してもよい。ここで、半導体素子1以外の
領域は、絶縁性接着剤25で接着すればよい。
In the semiconductor device of FIG. 1 described above, an example is shown in which the external circuit 3 is formed by a printing method.
2 (in the figure, 21 is an insulating substrate, 22 is an external circuit and 23
Represents connection terminals such as bumps). As shown in FIG. 5, the connection terminal 1d of the semiconductor element 1 and the connection terminal 23 of the external circuit 22 manufactured by an arbitrary method are connected to each other by an anisotropic conductive adhesive 24.
May be connected via a. Here, the region other than the semiconductor element 1 may be bonded with the insulating adhesive 25.

【0017】本発明の半導体装置の具体的な適用例とし
て、図3にデータキャリアとしてICカードを示す。
FIG. 3 shows an IC card as a data carrier as a specific application example of the semiconductor device of the present invention.

【0018】このICカードは、半導体素子31及びコ
ンデンサ32が図1の半導体素子と同様に樹脂基板33
中に埋設され、アンテナコイル34が印刷法で樹脂基板
33の表面に形成された構造を有する。ここで、半導体
素子31は、そのダイシング面(図示せず)が樹脂基板
33から露出しないように埋設されている。但し、半導
体素子31の接続端子(図示せず)は、コンデンサ32
及びアンテナコイル34と接続できるように樹脂基板3
3中に埋め込まれていない。また、半導体素子31の接
続端子側表面及びコンデンサ32の接続端子側表面と樹
脂基板33の表面とが、略同一平面レベルであることが
好ましい。更に、樹脂基板33のアンテナコイル34側
面上に保護フィルム(図示せず)を積層することが好ま
しい。
In this IC card, the semiconductor element 31 and the capacitor 32 are similar to the semiconductor element of FIG.
It has a structure in which the antenna coil 34 is buried inside and formed on the surface of the resin substrate 33 by a printing method. Here, the semiconductor element 31 is buried so that its dicing surface (not shown) is not exposed from the resin substrate 33. However, the connection terminal (not shown) of the semiconductor element 31 is
And the resin substrate 3 so that it can be connected to the antenna coil 34.
3 is not embedded. Further, it is preferable that the connection terminal side surface of the semiconductor element 31, the connection terminal side surface of the capacitor 32, and the surface of the resin substrate 33 are at substantially the same plane level. Further, it is preferable to laminate a protective film (not shown) on the side surface of the antenna coil 34 of the resin substrate 33.

【0019】なお、アンテナコイル34として巻線を使
用することもできる。この場合、巻線を樹脂基板33中
に埋め込むように配設することが好ましい。
Note that a winding may be used as the antenna coil 34. In this case, it is preferable to dispose the winding so as to be embedded in the resin substrate 33.

【0020】以上のようなICカード等のデータキャリ
アは、図1の半導体装置と同様に、半導体素子のエッジ
ショートの問題がなく、厚みも薄くなり、安価に製造で
きる。
The data carrier such as the IC card described above does not have the problem of edge short of the semiconductor element, has a small thickness, and can be manufactured at a low cost, similarly to the semiconductor device of FIG.

【0021】本発明の半導体装置は、以下に説明する工
程を経て製造することができる。
The semiconductor device of the present invention can be manufactured through the steps described below.

【0022】まず、半導体素子41を、加圧又は加圧加
熱により容易に変形しうる樹脂基板42の表面の所定部
位に、その接続端子41aが上を向くように載置する
(図4(a))。
First, the semiconductor element 41 is placed on a predetermined portion of the surface of the resin substrate 42 which can be easily deformed by pressurization or pressurization and heating so that the connection terminal 41a faces upward (FIG. 4 (a)). )).

【0023】次に、半導体素子41のダイシング面41
bが樹脂基板42表面に露出しないように、ボンディン
グヘッド43で半導体素子41を加圧又は加圧加熱し、
樹脂基板42を変形させながら樹脂基板42中に半導体
素子41を埋設する(図4(b))。このとき、半導体
素子41の接続端子41aが外部回路と接続可能となる
ように、樹脂基板42の表面に露出させる。
Next, the dicing surface 41 of the semiconductor element 41
Pressing or heating the semiconductor element 41 with the bonding head 43 so that b is not exposed on the surface of the resin substrate 42;
The semiconductor element 41 is embedded in the resin substrate 42 while deforming the resin substrate 42 (FIG. 4B). At this time, the connection terminal 41a of the semiconductor element 41 is exposed on the surface of the resin substrate 42 so that the connection terminal 41a can be connected to an external circuit.

【0024】更に、必要に応じて、種々の電子部品、例
えばコンデンサ44をボンディングヘッド43で加圧又
は加圧加熱し、樹脂基板42を変形させながら樹脂基板
42中にコンデンサ44を埋設する(図4(c))。
Further, if necessary, various electronic components, for example, the capacitor 44 are pressed or heated by the bonding head 43 to embed the capacitor 44 in the resin substrate 42 while deforming the resin substrate 42 (FIG. 1). 4 (c)).

【0025】続いて、半導体素子41の接続端子41a
及びコンデンサ44の接続端子44aとを接続するため
に、アンテナコイル(図示せず)を含む回路45を印刷
法により形成する(図4(d))。
Subsequently, the connection terminal 41a of the semiconductor element 41
Then, a circuit 45 including an antenna coil (not shown) is formed by a printing method to connect the connection terminal 44a of the capacitor 44 (FIG. 4D).

【0026】更に、必要に応じて、樹脂基板42の半導
体素子41側表面に接着剤層46を介して保護フィルム
47を積層する(図4(e))。
Further, if necessary, a protective film 47 is laminated on the surface of the resin substrate 42 on the semiconductor element 41 side via an adhesive layer 46 (FIG. 4E).

【0027】本発明の半導体装置は、以上説明したIC
カードやICタグ等のデータキャリアに特に適したもの
であるが、それに限定されるものではない。
The semiconductor device according to the present invention has the above-described IC
It is particularly suitable for data carriers such as cards and IC tags, but is not limited thereto.

【0028】なお、本発明の半導体装置を構成する各要
素、例えば半導体素子、樹脂基板、接続端子、コンデン
サ等のサイズ、材質等については、公知のものを適宜選
択して使用することができる。
It is to be noted that known components can be appropriately selected and used for the respective components constituting the semiconductor device of the present invention, for example, the sizes and materials of the semiconductor elements, resin substrates, connection terminals, capacitors and the like.

【0029】[0029]

【発明の効果】本発明によれば、データキャリア(例え
ば、ICカード、ICタグ)等の半導体装置の厚みを厚
くすることなく、半導体素子(ICチップ)のエッジシ
ョートを生じさせることなく、且つ低コストで製造でき
る。
According to the present invention, a semiconductor device such as a data carrier (for example, an IC card or an IC tag) is not thickened, and an edge short circuit of a semiconductor element (an IC chip) is not caused. Can be manufactured at low cost.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体装置の概略断面図である。FIG. 1 is a schematic sectional view of a semiconductor device of the present invention.

【図2】本発明の半導体装置の概略断面図である。FIG. 2 is a schematic sectional view of a semiconductor device of the present invention.

【図3】本発明のデータキャリアの概略斜視図である。FIG. 3 is a schematic perspective view of a data carrier of the present invention.

【図4】本発明の半導体装置の製造工程図である。FIG. 4 is a manufacturing process diagram of the semiconductor device of the present invention.

【図5】従来のICカードの概略斜視図である。FIG. 5 is a schematic perspective view of a conventional IC card.

【図6】従来のICカードで生じるエッジショートの説
明図である。
FIG. 6 is an explanatory diagram of an edge short circuit occurring in a conventional IC card.

【符号の説明】[Explanation of symbols]

1 半導体素子,2 樹脂基板,3 外部回路,4 接
着剤層,5 保護フィルム
Reference Signs List 1 semiconductor element, 2 resin substrate, 3 external circuit, 4 adhesive layer, 5 protective film

───────────────────────────────────────────────────── フロントページの続き (72)発明者 ▲松▼村 孝 栃木県鹿沼市さつき町12−3 ソニーケミ カル株式会社内 (72)発明者 周藤 俊之 栃木県鹿沼市さつき町12−3 ソニーケミ カル株式会社内 Fターム(参考) 5B035 AA00 AA04 AA11 BA05 BB09 BC00 CA01 CA08 CA12 CA23 CA31 5F047 AA17 CA01 CB05 FA52 5F061 AA01 BA03 CA26 FA03  ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor ▲ Matsutaka Takashi 12-3 Satsukicho, Kanuma-shi, Tochigi Sony Chemical Co., Ltd. (72) Inventor Toshiyuki 12-3 Satsukicho, Kanuma-shi, Tochigi Sony Chemical stock In-house F term (reference) 5B035 AA00 AA04 AA11 BA05 BB09 BC00 CA01 CA08 CA12 CA23 CA31 5F047 AA17 CA01 CB05 FA52 5F061 AA01 BA03 CA26 FA03

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】 加圧又は加圧加熱により容易に変形しう
る樹脂基板に保持された半導体素子を含む半導体装置に
おいて、半導体素子のダイシング面が樹脂基板から露出
せず且つ半導体素子の接続端子が外部回路と接続可能と
なるように、半導体素子が樹脂基板中に埋設されたもの
であることを特徴とする半導体装置。
In a semiconductor device including a semiconductor element held on a resin substrate which can be easily deformed by pressurization or heating under pressure, a dicing surface of the semiconductor element is not exposed from the resin substrate, and a connection terminal of the semiconductor element is formed. A semiconductor device, wherein a semiconductor element is embedded in a resin substrate so as to be connectable to an external circuit.
【請求項2】 半導体素子の接続端子側表面と樹脂基板
の表面とが、略同一平面レベルである請求項1記載の半
導体装置。
2. The semiconductor device according to claim 1, wherein the surface of the connection terminal side of the semiconductor element and the surface of the resin substrate are substantially at the same plane level.
【請求項3】 半導体素子の接続端子が、樹脂基板の表
面に配設された印刷回路又は巻線と接続している請求項
1記載の半導体装置。
3. The semiconductor device according to claim 1, wherein a connection terminal of the semiconductor element is connected to a printed circuit or a winding disposed on a surface of the resin substrate.
【請求項4】 樹脂基板の印刷回路又は巻線側の表面に
保護フィルムが積層されている請求項3記載の半導体装
置。
4. The semiconductor device according to claim 3, wherein a protective film is laminated on a surface of the resin substrate on a printed circuit or winding side.
【請求項5】 半導体素子の接続端子が、外部回路の表
面に形成された回路の端子と異方性導電接着剤を介して
接続されている請求項1記載の半導体装置。
5. The semiconductor device according to claim 1, wherein a connection terminal of the semiconductor element is connected to a terminal of a circuit formed on a surface of the external circuit via an anisotropic conductive adhesive.
【請求項6】 加圧又は加圧加熱により容易に変形しう
る樹脂基板に保持された半導体素子及びコンデンサと、
樹脂基板の表面に形成され且つ半導体素子及びコンデン
サと接続しているアンテナコイルとを有するデータキャ
リアにおいて:半導体素子のダイシング面が樹脂基板か
ら露出せず且つ半導体素子の接続端子が外部回路と接続
可能となるように、半導体素子は樹脂基板中に埋設され
たものであること;コンデンサは樹脂基板中に埋設され
たものであること; 及びアンテナコイルは印刷回路又
は巻線から構成されていることを特徴とするデータキャ
リア。
6. A semiconductor element and a capacitor held on a resin substrate which can be easily deformed by pressurization or pressurization and heating;
In a data carrier having an antenna coil formed on a surface of a resin substrate and connected to a semiconductor element and a capacitor: a dicing surface of the semiconductor element is not exposed from the resin substrate, and a connection terminal of the semiconductor element can be connected to an external circuit. That the semiconductor element is embedded in the resin substrate; that the capacitor is embedded in the resin substrate; and that the antenna coil is composed of a printed circuit or a winding. Characteristic data carrier.
【請求項7】 半導体素子の接続端子側表面及びコンデ
ンサの接続端子側表面と樹脂基板の表面とが、略同一平
面レベルである請求項6記載のデータキャリア。
7. The data carrier according to claim 6, wherein the surface of the connection terminal of the semiconductor element, the surface of the connection terminal of the capacitor, and the surface of the resin substrate are substantially at the same plane level.
【請求項8】 樹脂基板のアンテナコイル側面上に保護
フィルムが積層されている請求項7記載のデータキャリ
ア。
8. The data carrier according to claim 7, wherein a protective film is laminated on the side of the antenna coil of the resin substrate.
【請求項9】 ICカード又はICタグである請求項6
〜8のいずれかに記載のデータキャリア。
9. An IC card or an IC tag.
9. The data carrier according to any one of items 1 to 8.
【請求項10】 樹脂基板表面の所定部位に、半導体素
子をその接続端子面が上を向くように載置し、半導体素
子のダイシング面が樹脂基板表面から露出せず且つ半導
体素子の接続端子が外部回路と接続可能となるように、
半導体素子を加圧又は加圧加熱することにより樹脂基板
を変形させながら樹脂基板中に半導体素子を埋設するこ
とを特徴とする半導体装置の製造方法。
10. A semiconductor element is mounted on a predetermined portion of a surface of a resin substrate such that a connection terminal surface thereof faces upward, a dicing surface of the semiconductor element is not exposed from the resin substrate surface, and a connection terminal of the semiconductor element is not provided. So that it can be connected to external circuits,
A method of manufacturing a semiconductor device, comprising embedding a semiconductor element in a resin substrate while deforming the resin substrate by pressurizing or heating the semiconductor element.
【請求項11】 半導体素子の接続端子に接続するため
の回路を樹脂基板上に印刷法により形成する請求項10
記載の製造方法。
11. A circuit for connecting to a connection terminal of a semiconductor element is formed on a resin substrate by a printing method.
The manufacturing method as described.
JP09932099A 1999-04-06 1999-04-06 Semiconductor device Expired - Lifetime JP3661482B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP09932099A JP3661482B2 (en) 1999-04-06 1999-04-06 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09932099A JP3661482B2 (en) 1999-04-06 1999-04-06 Semiconductor device

Publications (2)

Publication Number Publication Date
JP2000294577A true JP2000294577A (en) 2000-10-20
JP3661482B2 JP3661482B2 (en) 2005-06-15

Family

ID=14244356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP09932099A Expired - Lifetime JP3661482B2 (en) 1999-04-06 1999-04-06 Semiconductor device

Country Status (1)

Country Link
JP (1) JP3661482B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002288612A (en) * 2001-03-27 2002-10-04 Toppan Forms Co Ltd How to make a luggage tag
JP2002334312A (en) * 2001-05-11 2002-11-22 Dainippon Printing Co Ltd Contact / non-contact type IC module and manufacturing method thereof
JP2004247706A (en) * 2003-01-23 2004-09-02 Shinko Electric Ind Co Ltd Electronic component mounting structure and method of manufacturing the same
JP2006039902A (en) * 2004-07-27 2006-02-09 Ntn Corp Uhf band radio ic tag
JP2006309498A (en) * 2005-04-28 2006-11-09 Toppan Printing Co Ltd Non-contact IC inlet manufacturing method
JP2007511811A (en) * 2003-05-13 2007-05-10 ナグライーデー エスアー Mounting electronic components on a board
JPWO2014006787A1 (en) * 2012-07-04 2016-06-02 パナソニックIpマネジメント株式会社 Electronic component mounting structure, IC card, COF package
WO2018154880A1 (en) 2017-02-22 2018-08-30 オムロン株式会社 Method for manufacturing product, exterior component, and device for selecting antenna pattern

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002288612A (en) * 2001-03-27 2002-10-04 Toppan Forms Co Ltd How to make a luggage tag
JP2002334312A (en) * 2001-05-11 2002-11-22 Dainippon Printing Co Ltd Contact / non-contact type IC module and manufacturing method thereof
JP2004247706A (en) * 2003-01-23 2004-09-02 Shinko Electric Ind Co Ltd Electronic component mounting structure and method of manufacturing the same
US7573135B2 (en) 2003-01-23 2009-08-11 Shinko Electric Industries Co., Ltd. Electronic parts packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film
JP2007511811A (en) * 2003-05-13 2007-05-10 ナグライーデー エスアー Mounting electronic components on a board
JP2006039902A (en) * 2004-07-27 2006-02-09 Ntn Corp Uhf band radio ic tag
JP2006309498A (en) * 2005-04-28 2006-11-09 Toppan Printing Co Ltd Non-contact IC inlet manufacturing method
JPWO2014006787A1 (en) * 2012-07-04 2016-06-02 パナソニックIpマネジメント株式会社 Electronic component mounting structure, IC card, COF package
WO2018154880A1 (en) 2017-02-22 2018-08-30 オムロン株式会社 Method for manufacturing product, exterior component, and device for selecting antenna pattern
US11322828B2 (en) 2017-02-22 2022-05-03 Omron Corporation Method of manufacturing product, exterior jacket component and antenna pattern selection device

Also Published As

Publication number Publication date
JP3661482B2 (en) 2005-06-15

Similar Documents

Publication Publication Date Title
TWI337423B (en) Method for manufacturing a chip card antenna on a thermoplastic support and chip card obtained by said method
US6664645B2 (en) Method of mounting a semiconductor chip, circuit board for flip-chip connection and method of manufacturing the same, electromagnetic wave readable data carrier and method of manufacturing the same, and electronic component module for an electromagnetic wave readable data carrier
EP1132859A2 (en) Information recording security tag
CN1292129A (en) Electronic device with contactless electronic memory, and method for making same
US8348171B2 (en) Smartcard interconnect
US20240013021A1 (en) Card with fingerprint biometrics
US20080129455A1 (en) Method for forming rfid tags
WO2004038793A1 (en) Non-contact id card and the like and method for manufacturing same
JP2000294577A (en) Semiconductor device
CN102047403A (en) Electronic device and method of manufacturing an electronic device
US7674649B2 (en) Radio frequency identification (RFID) tag lamination process using liner
US7456506B2 (en) Radio frequency identification (RFID) tag lamination process using liner
JP2004514291A (en) How to attach an integrated circuit on a silicon chip to a smart label
JPH11317427A (en) Method of connecting pads of integrated circuit parts
JP2003006588A (en) IC module, manufacturing method thereof, and IC card manufacturing method
CN112714915B (en) Method for manufacturing card module and module obtained
JP2001143036A (en) Non-contact data carrier, IC chip used for the same, and method of attaching IC chip to non-contact data carrier
JPH11175676A (en) Non-contact IC card
JP2000132655A (en) Method of manufacturing non-contact type IC card and non-contact type IC card
JPS5948984A (en) Method of producing ic card
JPH07321438A (en) Printed circuit board
JP2001256461A (en) Manufacturing method of combination type IC card
JP4614302B2 (en) Hybrid IC card and method for manufacturing the same
JP2001250839A (en) Manufacturing equipment for semiconductor component mounted components, manufacturing equipment for semiconductor component mounted finished products, and semiconductor component mounted finished products
JP2003037348A (en) Circuit formation method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040123

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20040728

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20040810

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20041012

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20041109

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050106

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20050106

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20050301

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20050314

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090401

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090401

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100401

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110401

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120401

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130401

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130401

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140401

Year of fee payment: 9

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term