JP2000358046A - 通信システム、受信機及び相互接続ネットワーク - Google Patents

通信システム、受信機及び相互接続ネットワーク

Info

Publication number
JP2000358046A
JP2000358046A JP2000134366A JP2000134366A JP2000358046A JP 2000358046 A JP2000358046 A JP 2000358046A JP 2000134366 A JP2000134366 A JP 2000134366A JP 2000134366 A JP2000134366 A JP 2000134366A JP 2000358046 A JP2000358046 A JP 2000358046A
Authority
JP
Japan
Prior art keywords
adjacent
modules
return path
communication
path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2000134366A
Other languages
English (en)
Japanese (ja)
Inventor
Olivier Gay-Bellile
ゲ−ベリル オリヴィエ
Eric Dujardin
デュジャルダン エリク
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of JP2000358046A publication Critical patent/JP2000358046A/ja
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17337Direct connection machines, e.g. completely connected computers, point to point communication networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Small-Scale Networks (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
JP2000134366A 1999-05-11 2000-05-08 通信システム、受信機及び相互接続ネットワーク Abandoned JP2000358046A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9906020A FR2793628A1 (fr) 1999-05-11 1999-05-11 Systeme de transmission, recepteur et reseau d'interconnexion
FR9906020 1999-05-11

Publications (1)

Publication Number Publication Date
JP2000358046A true JP2000358046A (ja) 2000-12-26

Family

ID=9545487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000134366A Abandoned JP2000358046A (ja) 1999-05-11 2000-05-08 通信システム、受信機及び相互接続ネットワーク

Country Status (6)

Country Link
US (1) US6839357B1 (de)
EP (1) EP1052575A1 (de)
JP (1) JP2000358046A (de)
KR (1) KR100653111B1 (de)
CN (1) CN1147101C (de)
FR (1) FR2793628A1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7584309B2 (en) 2004-03-22 2009-09-01 Aten International Co., Ltd. Keyboard video mouse switch for multiple chaining and a method for switching electrical signals thereof

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3801559B2 (ja) * 2002-12-26 2006-07-26 ソニー株式会社 通信装置および方法、記録媒体、並びにプログラム
US7415595B2 (en) * 2005-05-24 2008-08-19 Coresonic Ab Data processing without processor core intervention by chain of accelerators selectively coupled by programmable interconnect network and to memory
US7725792B2 (en) * 2006-03-01 2010-05-25 Qualcomm Incorporated Dual-path, multimode sequential storage element
US11144497B2 (en) 2018-08-16 2021-10-12 Tachyum Ltd. System and method of populating an instruction word

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1118355B (it) * 1979-02-15 1986-02-24 Cselt Centro Studi Lab Telecom Sistema di interconnessione tra processori
US4663706A (en) * 1982-10-28 1987-05-05 Tandem Computers Incorporated Multiprocessor multisystem communications network
FR2622989B1 (fr) * 1987-11-06 1992-11-27 Thomson Csf Machine multiprocesseur reconfigurable pour traitement du signal
US5937202A (en) * 1993-02-11 1999-08-10 3-D Computing, Inc. High-speed, parallel, processor architecture for front-end electronics, based on a single type of ASIC, and method use thereof
JPH06290158A (ja) * 1993-03-31 1994-10-18 Fujitsu Ltd 再構成可能なトーラス・ネットワーク方式
US6456628B1 (en) * 1998-04-17 2002-09-24 Intelect Communications, Inc. DSP intercommunication network

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7584309B2 (en) 2004-03-22 2009-09-01 Aten International Co., Ltd. Keyboard video mouse switch for multiple chaining and a method for switching electrical signals thereof

Also Published As

Publication number Publication date
CN1147101C (zh) 2004-04-21
KR100653111B1 (ko) 2006-12-04
US6839357B1 (en) 2005-01-04
FR2793628A1 (fr) 2000-11-17
CN1273476A (zh) 2000-11-15
KR20010014890A (ko) 2001-02-26
EP1052575A1 (de) 2000-11-15

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