JP2000505246A - 平面の熱膨張率の勾配を設計することによりパッケージの信頼性を高める方法 - Google Patents
平面の熱膨張率の勾配を設計することによりパッケージの信頼性を高める方法Info
- Publication number
- JP2000505246A JP2000505246A JP10521415A JP52141598A JP2000505246A JP 2000505246 A JP2000505246 A JP 2000505246A JP 10521415 A JP10521415 A JP 10521415A JP 52141598 A JP52141598 A JP 52141598A JP 2000505246 A JP2000505246 A JP 2000505246A
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- JP
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- Prior art keywords
- layer
- layers
- thermal expansion
- chip
- coefficient
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/877—Bump connectors and die-attach connectors
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24942—Structurally defined web or sheet [e.g., overall dimension, etc.] including components having same physical characteristic in differing degree
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.少なくとも2つの層に共通する個々の構成材料の濃度を確認し、 それらの層を複数の単位区域に区分し、 2つの層の少なくとも1つにおいて、個々の構成材料の濃度を調節し、各層の 各単位区域において、同じ構成材料がほぼ同じ濃度になるようにする、 各工程を含むパッケージの信頼性を高める方法。 2.前記個々の構成材料の濃度を調節する工程が、それらの層の少なくとも1 つの層に前記個々の構成材料をより多く添加し、各層の複数の単位区域の前記各 単位区域において、同じ材料が前記のほぼ同じ濃度になるようにする付加的工程 を含む請求項1に記載の方法。 3.前記個々の構成材料の濃度を調節する工程が、それらの層の少なくとも1 つの層から個々の構成材料の一部を除去し、前記複数の層の各層の複数の単位区 域の各単位区域において、同じ構成材料が前記のほぼ同じ濃度になるようにする 付加的工程を含む請求項1に記載の方法。 4.基材に層状材料を使用する付加的工程を含む請求項1に記載の方法。 5.層の広がりに沿って不均等に分配された材料成分を有する第1層、 第1層の材料と同じ材料を有する第2層であって、その広がりに沿って不均等 に分配された第2層、 を含んでなり、 前記第1層と第2層の一方の材料の濃度が、第1層と第2層の他 方の材料の濃度に近い、 層状構造。 6.第1層と第2層が、多層のラミネートされた集積チップパッケージの構成 層である請求項5に記載の層状構造。 7.第1層と第2層が、パッケージの水平な対称面について対称的に配置され た請求項5に記載の層状構造。 8.第1層と第2層の少なくとも一方が、あるパターンを形成された伝導性層 であり、第1層と第2層の他方が伝導性層である請求項7に記載の層状構造。 9.その層の広がりに沿って不均等に分配された材料成分を有する第3層、及 び第3層の材料と同じ材料を有する第4層であってその広がりに沿って不均等に 分配された第4層をさらに備え、第3層と第4層の一方の材料が、第3層と第4 層の他方の材料の濃度に近い濃度である請求項5に記載の層状構造。 10.第1層と第2層が、構造の水平な対称面について対称的に配置され、第 3層と第4層が、構造の水平な対称面について対称的に配置された請求項9に記 載の層状構造。 11.第1層と第2層を作成し、 第1層にあるパターンを形成し、 第1層の少なくとも1つの区域において、材料の分布を測定し、 第1層の区域と第2層の対応区域の少なくとも一方において、第1層と第2層 の一方の材料含有率を変化させ、第1層と第2層の材料含有率をほぼマッチさせ る、 各工程を含む層状構造の製造方法。 12.第1層と第2層のマッチした区域を垂直に整合させ、水平な対称面の相 対する側に第1層と第2層を配置することをさらに含む請求項11に記載の方法 。 13.複数の画定された区域を備えた格子において、材料の分布を測定するこ とをさらに含む請求項12に記載の方法。 14.第1層の同じ区域に対応する各区域において、第2層の材料含有率を変 化させ、第1層の材料含有率にほぼマッチさせることをさらに含む請求項13に 記載の方法。 15.第1層と第2層が同じタイプの材料からなる請求項12に記載の方法。 16.第1層と第2層が伝導性層である請求項15に記載の方法。 17.第1層と第2層が、銅、金、銀、及びアルミニウムからなる群より選択 された材料からなる請求項16に記載の方法。 18.第3層と第4層を作成し、第3層にあるパターンを形成し、第3層の少 なくとも1つの区域における材料の分布を測定し、第3層の区域と第4層の対応 区域の少なくとも一方において、第3層と第4層の一方の材料含有率を変化させ 、最初の第3層と第4層の材料含有率をほぼマッチさせることをさらに含む請求 項12に記載の方法。 19.第3層と第4層のマッチした区域を垂直に整合させ、水平な対称面の相 対する側に第3層と第4層を対称的に配置することをさらに含む請求項18に記 載の方法。 20.複数の画定された区域を備えた格子の中の材料の分布を測定することを さらに含む請求項19に記載の方法。 21.第3層と第4層の一方の材料含有率を、第3層と第4層の他方の同じ区 域に対応する各区域において変化させ、対応区域における第3層と第4層の材料 含有率をほぼマッチさせることをさらに含む請求項20に記載の方法。 22.第3層と第4層が同じタイプの材料からなる請求項21に 記載の方法。 23.第3層と第4層が伝導性層である請求項22に記載の方法。 24.第3層と第4層が、銅、金、銀、及びアルミニウムからなる群より選択 された材料からなる請求項23に記載の方法。 25.第1層と第2層が、構造の水平な対称面について対称的に配置され、第 3層と第4層が、構造の水平な対称面について対称的に配置された請求項18に よる層状構造に係る方法。 26.同じタイプの材料の第1層と第2層を作成し、 第1層と第2層の一方にパターン形成して電気回路パターンを作成し、それに よって、材料の分布を有するパターン形成された層を作成し、 第1層と第2層の他方において材料の分布を変化させ、パターン形成された層 のそれにマッチさせる、 各工程を含む、面内に熱膨張率勾配を設計する方法。 27.パターン形成された層を、複数の同じサイズのゾーンに区分し、各ゾー ンにおける材料の分布を測定することをさらに含む請求項26に記載の方法。 28.変化させる工程が、第1層と第2層の他方の材料分布を変化させ、パタ ーン形成された層のそれにマッチさせることを含む請求項27に記載の方法。
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/745,597 US5888630A (en) | 1996-11-08 | 1996-11-08 | Apparatus and method for unit area composition control to minimize warp in an integrated circuit chip package assembly |
| US08/745,597 | 1996-11-08 | ||
| PCT/US1997/018639 WO1998020556A1 (en) | 1996-11-08 | 1997-10-17 | Method of increasing package reliability by designing in plane cte gradients |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010178017A Division JP5491316B2 (ja) | 1996-11-08 | 2010-08-06 | パッケージの信頼性を高める方法、層状構造及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000505246A true JP2000505246A (ja) | 2000-04-25 |
| JP2000505246A5 JP2000505246A5 (ja) | 2005-06-16 |
| JP4615631B2 JP4615631B2 (ja) | 2011-01-19 |
Family
ID=24997393
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52141598A Expired - Lifetime JP4615631B2 (ja) | 1996-11-08 | 1997-10-17 | 面内に熱膨張率勾配を設計する方法 |
| JP2010178017A Expired - Lifetime JP5491316B2 (ja) | 1996-11-08 | 2010-08-06 | パッケージの信頼性を高める方法、層状構造及びその製造方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010178017A Expired - Lifetime JP5491316B2 (ja) | 1996-11-08 | 2010-08-06 | パッケージの信頼性を高める方法、層状構造及びその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US5888630A (ja) |
| JP (2) | JP4615631B2 (ja) |
| AU (1) | AU4758497A (ja) |
| WO (1) | WO1998020556A1 (ja) |
Cited By (1)
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|---|---|---|---|---|
| JP2009161769A (ja) * | 2009-04-06 | 2009-07-23 | Sumitomo Bakelite Co Ltd | プリプレグおよび積層板 |
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Also Published As
| Publication number | Publication date |
|---|---|
| US6184589B1 (en) | 2001-02-06 |
| JP2011018911A (ja) | 2011-01-27 |
| US6127250A (en) | 2000-10-03 |
| AU4758497A (en) | 1998-05-29 |
| JP4615631B2 (ja) | 2011-01-19 |
| WO1998020556A1 (en) | 1998-05-14 |
| JP5491316B2 (ja) | 2014-05-14 |
| US5888630A (en) | 1999-03-30 |
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