JP2001237228A - Substrate processing method, substrate processing apparatus, and device manufacturing method - Google Patents

Abstract

(57) [Problem] To improve a process of forming a conductive hole for exposing an aluminum wiring or the like from an interlayer insulating film. SOLUTION: A side wall protective film 4 formed in a plasma etching step for forming a via hole 2a as a conduction hole in a silicon-based oxide film 2 as an interlayer insulating film of a substrate is formed by water in a plasma treatment for removing a resist mask 3. Modifies easily to dissolve in water. Next, the substrate is immersed in a solution of pure water and hydrogen peroxide to remove the sidewall protective film 4 of the via hole 2a almost completely.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate processing method, a substrate processing apparatus, and a device manufacturing method for performing a surface treatment of a substrate such as a wafer for manufacturing a semiconductor device such as a semiconductor microprocessor and a semiconductor memory.

[0002]

2. Description of the Related Art In recent years, in the manufacture of semiconductor devices and the like, it is essential to employ a multi-layer wiring technique in which an interlayer insulating film is stacked on a substrate as many layers as the degree of integration and function thereof increases. In order to form a desired electric circuit with the multi-layered wirings stacked in layers, via holes are formed as conduction holes connecting the upper wiring and the lower wiring with an interlayer insulating film interposed therebetween.

[0003] Via hole processing is generally performed by an omnidirectional etching using gas plasma because of its high processing speed and high processing accuracy. At the time of this etching, the inner surface of the via hole is formed by a compound containing an organic component from the resist mask, a metal component considered to be sputtered from a portion where the base is exposed, and a depot component generated from a plasma gas. Is covered with the sidewall protective film. It is necessary to remove the film of the compound component after etching, and conventionally, the film has been removed by a chemical treatment using an organic solvent.

The step of forming a via hole will be described in detail. First, as shown in FIG. 9A, a plasma CVD method or a usual method is performed on an aluminum wiring 101 provided on the surface of a wafer base material (not shown). A resist mask 103 is uniformly applied to the silicon-based oxide film 102 deposited by a pressure CVD method or the like, and is exposed by an exposure apparatus so as to form a mask opening 103a having a desired size of a via hole diameter, and is patterned by development. .

[0005] Via hole etching for exposing a desired portion of the aluminum wiring 101 is performed using CF ₄ , CHF ₃ , or the like.
Reactive etching using a mixed gas such as Ar,
Alternatively, an etching method such as an ECR etching method, a helicon plasma etching method, an ICP etching method, or the like is employed (see FIG. 9B).

In all of these etching methods, since a high frequency is applied to a stage holding a wafer,
The main reaction modes of etching are the breaking of chemical bonds due to physical bombardment by ions entering the wafer in the normal direction, and the chemical reaction generated by the plasma and the constituent molecules of the cut Si-based oxide film. This is due to a vaporization reaction with the seed.

[0007] As a secondary reaction, isotropic etching by reactive species generated in the plasma, which increases the diameter of the via hole, may occur, but this is caused by collision of ions with the resist mask 103. Addition of a gas having a component that is easily deposited such as CHF ₃ to the plasma, or a sidewall protective film 104 formed by sputtering of a silicon-based compound from a silicon-based oxide film 102 during the etching process, or a silicon-based compound during etching. By doing so, the side wall protective film formed so as to cover the side wall suppresses lateral etching below the allowable dimension.

The side wall protective film 104 is formed on the lower aluminum wiring 1.
Until the metal surface of No. 01 is exposed, no metal is contained in its constituent components. However, when the metal surface is exposed, the metal component is immediately incorporated.

[0009] The side wall protective film 104 into which the metal component has been incorporated has poor reactivity. Also, depending on the etching conditions, the sidewall protective film 104 may generate a residue which has a bottom on the bottom surface of the via hole.

Next, as shown in FIG. 9C, the used resist mask 103 is removed by oxygen plasma ashing.
Alternatively, peeling is performed by oxygen downflow ashing. Although the used resist is removed, the poorly reactive sidewall protective film 104 cannot be removed by ashing and contains a metal component, so that it is oxidized by oxygen at the time of ashing and becomes a compound with poor reactivity.

Subsequently, as shown in FIG. 9D, the side wall protective film 104 is removed with an organic solvent-based chemical. However, since the organic solvent is used, a small amount of the organic component 105 is removed.
Are attached to the surface.

[0012]

According to the above prior art, an organic solvent is used as a chemical solution for surface treatment in the final step of via hole etching, and after the treatment, a very small amount of organic component 105 is deposited on the wafer surface as an adhering substance. As a result, the embedding property of the metal embedded in the via hole is deteriorated, and electrical conduction between the upper wiring and the lower wiring is hindered.

Therefore, RCA cleaning or the like consisting of a plurality of chemical cleaning steps for removing the organic components is required. However, if the organic components cannot be completely removed, the yield will decrease, and a plurality of chemical cleaning steps will be required. Doing so increases costs.

In order to solve this problem, (Japan
Journal of Applied Physi
cs Vol. 32 (1993) pp 3045-30
50part1, No. 6B, June 1993), after etching of a via hole, removal of the used resist mask and a compound covering the side wall of the via hole by a treatment using a mixed gas plasma of a gas containing fluorine and H ₂ О gas after etching the via hole. A method has been proposed in which the components are simultaneously converted to water-soluble components, and after this step, the wafer is immersed in pure water to remove the sidewall protective film of the via hole. It is not universal because it often depends on the conditions.

The metal layer 101 under the silicon-based oxide film 102, which is an interlayer insulating film, includes a metal layer containing Ti or the like as an anti-reflection film or a barrier metal, and Al as a main wiring as a main component. In some cases, the desired etching process includes an interlayer insulating film,
In recent years, the number of processes for etching the upper metal layer containing Ti and exposing the lower metal wiring layer containing Al as a main component has been increasing. In this case, the component of the sidewall protective film covering the sidewall of the via hole has been increased. The structure becomes extremely complicated due to the inclusion of Ti. Therefore, removal of the compound covering the side wall of the via hole is extremely difficult by the above method.

In other words, the removal performance by the above method depends on the etching conditions of the via hole and the type of metal to be etched, and is a technique which is not yet suitable for a mass production process. In the mass production process, after the etching, the removal of the mixed component of metal and organic covering the side wall is inevitably resorted to chemical treatment with an organic solvent that always provides stable removal performance.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned unsolved problems of the prior art, and greatly simplifies the process of etching a conductive hole for connecting a laminated circuit, thereby improving the yield of semiconductor devices and the like. It is an object of the present invention to provide a substrate processing method, a substrate processing apparatus, and a device manufacturing method that can contribute to cost reduction.

[0018]

In order to achieve the above object, a substrate processing method according to the present invention comprises exposing an interlayer insulating film laminated on a metal film to gas plasma through a mask opening.
Forming a conductive hole, reforming a sidewall protective film of the formed conductive hole with gas plasma, and stripping the modified sidewall protective film with a solution containing pure water and hydrogen peroxide. It is characterized by the following.

Preferably, the metal film is a metal wiring layer.

The metal film may be composed of a plurality of layers having a metal wiring layer and an upper metal layer laminated thereon.

The gas plasma for forming the conduction hole is:
The plasma may be a mixed gas plasma containing fluorine and hydrogen.

The gas plasma for modifying the side wall protective film is preferably a plasma of a mixed gas containing fluorine and hydrogen.

It is preferable to apply ultrasonic vibration to a solution containing pure water and hydrogen peroxide.

According to the present invention, there is provided a substrate processing apparatus comprising: a plasma etching unit for forming a conductive hole in an interlayer insulating film of a substrate; and a plasma reforming unit for modifying a sidewall protective film of the conductive hole by gas plasma. And a dipping means for dipping the substrate after reforming the side wall protective film in a solution of pure water and hydrogen peroxide.

[0025]

The sidewall protective film of the conductive hole is reformed into a substance which is easily soluble in water by gas plasma, and then immersed in a solution of pure water and hydrogen peroxide to remove the sidewall protective film. Hydrogen peroxide in the solution promotes oxidation of the sidewall protective film and makes it more soluble in water, so it is easy to peel off the sidewall protective film containing organic and metal components, and greatly reduces the residue after processing. it can.

As compared with the case where the side wall protective film is removed by using an organic solvent, the number of steps can be reduced, the removal performance is stable, and the cleaning step after the treatment can be greatly simplified. Suitable for mass production with wide application range.

By employing such a substrate processing method, the manufacturing cost of semiconductor devices and the like can be significantly reduced.

[0028]

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows a substrate processing method according to an embodiment. As shown in FIG. 1A, a metal film (metal wiring layer) provided on the surface of a wafer base material as a substrate is used. On a certain aluminum wiring 1, a resist mask 3 is uniformly applied to a silicon-based oxide film 2, which is a deposited interlayer insulating film, by a plasma CVD method or a normal pressure CVD method. As shown in ()), exposure is performed by an exposure device so as to form a mask opening 3a having a via hole diameter of a desired size, and patterning is performed by development.

The via hole etching for forming the via hole 2a which is a conduction hole for exposing a desired portion of the aluminum wiring 1 is performed by a reactive etching method using plasma of a mixed gas such as CF ₄ , CHF ₃ , Ar or the like. , An ECR etching method, a helicon plasma etching method, an ICP etching method and the like.

In all of these etching methods, since a high frequency is applied to the stage holding the wafer,
The main reaction modes of etching are the breaking of chemical bonds due to physical bombardment by ions entering the wafer in the normal direction, and the chemical reaction generated by the plasma and the constituent molecules of the cut silicon-based oxide film. This is due to a vaporization reaction with the seed.

As a secondary reaction, isotropic etching due to a reactive species generated in the plasma, which increases the diameter of the via hole, may occur. Material spattering,
Side wall protective film 4 by sputtering of a silicon-based compound from silicon-based oxide film 2 during etching, or C
By adding a gas having an arbitrarily easy-to-deposit component, such as HF _3, to the plasma, the side wall protective film formed so as to cover the side wall suppresses the lateral etching to an allowable dimension or less.

Until the metal surface of the lower layer (aluminum wiring 1) is exposed, the side wall protective film 4 does not contain metal in its constituent components, but the metal component is immediately incorporated when the metal surface is exposed.

Following the above steps, ashing is performed by a gas plasma process using a gas containing H (hydrogen) and a gas containing F (fluorine), or ashing is performed by a downflow of the gas plasma to remove the resist mask 3. (See FIG. 1C.) During the same process, the sidewall protective film 4 is modified so that it is easily dissolved in a solution of pure water and hydrogen peroxide in a later step.

FIG. 1D shows a state after the ashing wafer is immersed in a solution of pure water and hydrogen peroxide, and the sidewall protective film 4 is almost completely removed. This is because the sidewall protective film 4 that has been reformed and becomes slightly soluble in pure water is exposed to a gas containing F atoms and H atoms without using a large amount of oxygen. It is considered that the addition of hydrogen peroxide promoted the oxidation and facilitated the removal.

As described above, since the sidewall protective film of the via hole can be effectively removed by a simple process, the cleaning process for removing the surface residue after the treatment is greatly simplified.

According to the present embodiment, the metal film under the silicon-based oxide film 2 is only one type of aluminum wiring. For example, as shown in FIG. Even in the case of a multi-layer structure in which a metal film 12 serving as an upper metal layer containing Ti (titanium) or the like as an anti-reflection film or a barrier metal is laminated on the metal film 11 serving as a wiring, the sidewall protection film 14 is formed in the same process. Can be completely removed.

The via hole is etched by a reactive etching method or a plasma etching method such as an ECR etching method, a helicon plasma etching method, an ICP etching method, or the like. The gas used for etching is CF ₄ , CHF ₃ , Ar
Etc. in many cases. The purpose of each gas addition is to use CF ₄ to generate the etching species
HF ₃ is used for forming a sidewall protective film, and Ar is often used for stable discharge of plasma. As an alternative to CF ₄ of the gas used to generate the etching species, C ₄
Gases such as F ₈ , C ₂ F ₆ , C ₃ F ₈ and NF ₃ can also be used.

In the plasma treatment for simultaneously modifying the sidewall protective film after the via hole etching and ashing the resist mask, microwave plasma, microwave plasma down flow, and RF plasma down flow can be used. The gas used for this treatment is SF
₆ , H ₂ О mixed gas, NF ₃ and H ₂混合 mixed gas, C
Mixed gas of F ₄ and H ₂ 、, mixed gas of SF ₆ and H ₂ , N
A mixed gas of F ₃ and H _2, a mixed gas of CF ₄ and H ₂ , etc.
It is composed of a gas containing an element and a gas containing an H element. In addition, a small amount of a rare gas, a N ₂ gas, or the like may be added using these gases as main components for stabilizing or diluting plasma, or for some purpose to increase the dissociation rate.

The solution used for removing the modified sidewall protective film together with other residues after the above-mentioned plasma treatment is a mixed solution of high-purity pure water and hydrogen peroxide used for the semiconductor industry. However, a small amount of aqueous ammonia, sulfuric acid, or hydrochloric acid may be added using the mixed solution as a main component. However, addition of sulfuric acid and hydrochloric acid, which are acids,
Since the exposed metal film may be etched more than necessary, it is limited to a very small range according to the etching amount.

If a vibration generating means for applying ultrasonic vibration is provided in a solution processing tank containing a solution of pure water and hydrogen peroxide, the solution being processed is agitated, and the processing efficiency is further improved. Can be done.

Example 1 In the RIE apparatus shown in FIG. 3, a plasma generation chamber 51 serving as plasma etching means was used.
A wafer W, which is a substrate, is placed on a holder 52 in the inside, a valve 53 is opened, and the inside of the plasma generation chamber 51 is exhausted from an exhaust port 54. Next, a processing gas is introduced from the gas supply port 55. The mass flow controller 56 provided in communication with the gas supply port 55 is adjusted to introduce a processing gas at a predetermined flow rate. For example, 10sccm the CF _4, CHF
₃ is supplied at about 40 sccm, and Ar is supplied at about 150 sccm.

Thus, the inside of the plasma generation chamber 51 is maintained at a predetermined pressure lower than the atmospheric pressure. Specifically, 0.1P
It is desirable to maintain it at about a. And 13.56
A high frequency oscillator 57 having an adjusting unit for adjusting the intensity of the high frequency output of MHz is operated to apply a high frequency to the holder 52. Due to the supplied high-frequency energy, the processing gas is decomposed into a plasma state. In this state, the interlayer insulating film of the wafer W is etched. As a result, a via hole as shown in FIG. 1B is formed.

Subsequently, the processing is performed by the microwave plasma processing apparatus shown in FIG. The wafer W is placed on a holder 62 in a plasma generation chamber 61 which is a plasma reforming unit,
The valve 63 is opened, and the inside of the plasma generation chamber 61 is exhausted 6
Exhaust from 4. Next, a processing gas is introduced from the gas supply port 65. A mass flow controller 66 provided in communication with the gas supply port 65 is adjusted to introduce a processing gas at a predetermined flow rate. For example, 500 scc of H ₂ O gas
m and SF ₆ of about 100 sccm are supplied. Thus, the inside of the plasma generation chamber 61 is maintained at a predetermined pressure lower than the atmospheric pressure. Specifically, it is desirable to maintain the pressure at about 65.5 Pa. Then, by operating the microwave oscillator 67 having an adjusting means for adjusting the intensity of the microwave output,
Generate microwaves. The generated microwave is propagated along the waveguide 68 and supplied into the plasma generation chamber 61 through the microwave transmission window 69 made of alumina.

With the supplied microwave energy,
The processing gas is decomposed into a plasma state. As a result, the resist mask on the wafer W is peeled off, and the sidewall protective film is modified.

Even when TiN is present on the aluminum wiring as shown in FIG. 2, the resist mask is peeled off in the same process, and a state in which the side wall protective film is modified is obtained.

Subsequently, processing is performed by the solution processing apparatus shown in FIG. The wafer W is placed on a holder 72 in a solution processing tank 71 serving as an immersion means, and a solution 73 of pure water and hydrogen peroxide is placed.
Soak in The mixing ratio was about 8: 1 with pure water: hydrogen peroxide. As a result, a state in which the sidewall protective film was completely removed as shown in FIG. 1D was obtained. As shown in FIG.
For example, the same applies to the case where TiN is present on the aluminum wiring, and the sidewall protective film is completely removed.

In the step of etching the via hole,
From the viewpoint of easiness of embedding metal in the via hole, the opening may be formed wider than the bottom by a combination of isotropic etching and anisotropic etching. Residues due to tailing of the film and the bottom surface can also be completely removed by the above-described method.

(Embodiment 2) Via holes are formed in the same manner as in Embodiment 1 using the RIE apparatus shown in FIG.

Subsequently, the processing is performed by the microwave plasma down-flow processing apparatus shown in FIG. The metal showerhead 90 blocks the propagation of microwaves to the wafer W, and as a result, the wafer W is not exposed to plasma, so that the reaction proceeds mainly with electrically neutral chemical species. The wafer W is placed on the holder 82 in such a plasma downflow area, the valve 83 is opened, and the inside of the plasma generation chamber 81 is exhausted from the exhaust port 84. Next, gas supply port 8
From 5, a processing gas is introduced. A mass flow controller 86 provided in communication with the gas supply port 85 is adjusted to introduce a processing gas at a predetermined flow rate. In this embodiment, the H ₂ O gas is about 500 sccm and the SF ₆ is 100 sccm.
The supply was about sccm. Thus, the plasma generation chamber 81
Is maintained at a predetermined pressure lower than the atmospheric pressure. Specifically, it is desirable to maintain the pressure at about 65.5 Pa.

Then, the microwave generator 87 having the adjusting means for adjusting the intensity of the microwave output is operated to generate the microwave. The generated microwave is transferred to the waveguide 8
8 and is supplied into the plasma generation chamber 81 through a microwave transmission window 89 made of alumina. By the supplied microwave energy, the processing gas is decomposed to be in a plasma state. As a result, the resist was stripped, and the sidewall protective film was modified. For example, as shown in FIG.
The same effect occurred when iN was on the aluminum wiring, the resist was peeled off, and a state in which the sidewall protective film was modified was obtained.

Subsequently, processing is performed by the solution processing apparatus shown in FIG. The wafer W is placed on a holder 72 in a solution processing tank 71 and immersed in a solution 73 of pure water and hydrogen peroxide. The mixing ratio was about 8: 1 with pure water: hydrogen peroxide. As a result, a state in which the sidewall protective film was completely removed was obtained. As shown in FIG. 2, the same effect occurred when, for example, TiN was present on the aluminum wiring, and the sidewall protective film was completely removed.

Next, an embodiment of a device manufacturing method using the above-described substrate processing method will be described. FIG. 7 shows a manufacturing flow of a semiconductor device (a semiconductor chip such as an IC or an LSI, or a liquid crystal panel or a CCD). Step 1
In (circuit design), a circuit of a semiconductor device is designed.
Step 2 is a process for making a mask on the basis of the circuit pattern designed. In step 3 (wafer manufacture), a wafer is manufactured using a material such as silicon. Step 4 (wafer process) is called a pre-process, and an actual circuit is formed on the wafer by lithography using the prepared mask and wafer. Step 5 (assembly) is called a post-process, and is a process of forming a semiconductor chip using the wafer produced in step 4, and includes an assembly process (dicing, bonding),
It includes steps such as a packaging step (chip encapsulation). In step 6 (inspection), inspections such as an operation confirmation test and a durability test of the semiconductor device manufactured in step 5 are performed. Through these steps, a semiconductor device is completed and shipped (step 7).

FIG. 8 shows a detailed flow of the wafer process. Step 11 (oxidation) oxidizes the wafer's surface. Step 12 (CVD) forms an insulating film on the wafer surface. Step 13 (electrode formation) forms electrodes on the wafer by vapor deposition. In step 14 (ion implantation), ions are implanted into the wafer. Step 15
In (resist processing), a photosensitive agent is applied to the wafer. Step 16 (exposure) uses the exposure apparatus to print and expose the circuit pattern of the mask onto the wafer. Step 17 (development)
Then, the exposed wafer is developed. In step 18 (etching), portions other than the developed resist image are removed.
In step 19 (resist stripping), unnecessary resist after etching is removed. By repeating these steps, multiple circuit patterns are formed on the wafer. By using the manufacturing method of this embodiment,
A highly integrated semiconductor device, which was conventionally difficult to manufacture, can be manufactured.

[0055]

Since the present invention is configured as described above, the following effects can be obtained.

In the step of forming the conductive hole for connecting the laminated circuit by plasma etching, the removal of the sidewall protective film on the inner surface of the conductive hole after the etching can be performed simply, extremely effectively, and stably.

Since the residue after the treatment is small, the cleaning process for removing the residue is also easy, and the manufacturing process of the semiconductor device and the like is greatly simplified as compared with the case where the sidewall protective film is peeled off using an organic solvent or the like. Can be

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a substrate processing method according to one embodiment.

FIG. 2 is a diagram illustrating a substrate processing method according to a modification.

FIG. 3 is a diagram showing an RIE apparatus.

FIG. 4 is a diagram showing a microwave plasma processing apparatus.

FIG. 5 is a diagram showing a solution processing apparatus.

FIG. 6 is a diagram showing a microwave plasma downflow processing apparatus.

FIG. 7 is a flowchart illustrating a device manufacturing method.

FIG. 8 is a flowchart showing a wafer process.

FIG. 9 is a view showing a substrate processing method according to a conventional example.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 aluminum wiring 2 silicon-based oxide film 3 resist mask 4, 14 side wall protective film 11, 12 metal film 51, 61, 81 plasma generation chamber 52, 62, 72, 82 holder 71 solution treatment tank 73 pure water and hydrogen peroxide Solution 90 Metal shower head

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Keisuke Shinagawa 3-11-28 Mita, Minato-ku, Tokyo Canon Sales Inc. (72) Inventor Hitoshi Yamamoto 3-11-28 Mita, Minato-ku, Tokyo Canon Sales F term in the company (reference) 5F004 AA09 BA04 BA20 BD01 DA00 DA01 DA02 DA03 DA16 DA17 DA18 DA23 DA24 DA25 DB03 DB26 EA11 EA13 EB01 EB03 FA08 5F043 AA40 BB27 GG10

Claims (15)

[Claims] 1. A step of forming a conductive hole by exposing an interlayer insulating film laminated on a metal film to gas plasma through a mask opening, and modifying a sidewall protective film of the formed conductive hole by gas plasma. A method of processing a substrate, comprising: a step of removing the modified sidewall protective film with a solution containing pure water and hydrogen peroxide. 2. The substrate processing method according to claim 1, wherein the metal film is a metal wiring layer. 3. The substrate processing method according to claim 1, wherein the metal film is constituted by a plurality of layers having a metal wiring layer and an upper metal layer laminated thereon. 4. The substrate processing method according to claim 2, wherein the metal wiring layer is an aluminum wiring. 5. The substrate processing method according to claim 2, wherein the metal wiring layer is a copper wiring. 6. The substrate processing method according to claim 3, wherein the upper metal layer is a metal layer containing titanium. 7. The substrate processing method according to claim 1, wherein the interlayer insulating film is a silicon-based oxide film. 8. The substrate processing method according to claim 1, wherein the gas plasma for forming the conduction hole is a plasma of a mixed gas containing fluorine and hydrogen. 9. The substrate processing method according to claim 1, wherein the gas plasma for modifying the sidewall protective film is a plasma of a mixed gas containing fluorine and hydrogen. 10. The substrate processing method according to claim 1, wherein the reforming of the side wall protective film is performed during the downflow of the gas plasma. 11. The substrate processing method according to claim 1, wherein ultrasonic vibration is applied to a solution containing pure water and hydrogen peroxide. 12. A plasma etching means for forming a conductive hole in an interlayer insulating film of a substrate, a plasma modifying means for modifying a sidewall protective film of the conductive hole by gas plasma, and A substrate processing apparatus having immersion means for immersing the modified substrate in a solution of pure water and hydrogen peroxide. 13. The substrate processing apparatus according to claim 12, further comprising vibration generating means for applying ultrasonic vibration to a solution of pure water and hydrogen peroxide. 14. The substrate processing apparatus according to claim 12, wherein the plasma reforming means is configured to generate a downflow of the gas plasma. 15. A device manufacturing method comprising a step of processing a wafer by the substrate processing method according to claim 1. Description: