JP2001237347A - Bare chip mounting board and mounting method using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a packaging substrate for preventing the strength of the whole substrate packaged with chips from being reduced in the case where the number of chips to be packaged is extremely large or a packaging density in a substrate is increased or a substrate is enlarged in size, and a packaging method thereof. SOLUTION: A packaging method includes a step for making a hole larger than the outside size of a bare chip in a resin substrate by a molding method and burying a bare chip in the hole. The use of this packaging method and a resin packaging substrate made by the molding method prevents the strength of the substrate packaged with chips from being reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting a bare chip, and more particularly to a device such as a flat display device or an IC card, a device, an LED display device, etc., which are characterized by being thin. The present invention relates to a bare chip mounting board suitable for a circuit board to be used and a mounting method using the same.

[0002]

2. Description of the Related Art Conventionally, when an IC chip is mounted, an IC chip is mounted on a surface of a substrate by wire bonding or bump connection.
A C chip is mounted. FIG.
1 is a cross-sectional view of a bare chip mounting method suitable for a circuit used in an apparatus or the like characterized by being thin as shown in FIG. In this chip mounting method, a hole having a larger diameter than the IC chip extending from the back side to the wiring is provided on the substrate having the wiring formed on the front surface, and the IC chip corresponds to the electrode from the back side of the substrate in the hole. An IC chip is mounted on a substrate by being connected to a wiring to be formed via a bump.

[0003]

However, the conventional bare chip mounting method cannot cope with the recent demands for large and thin flat display devices and the like, and the circuits for these devices are much larger. In addition, it is necessary to mount it thinly. For example, a flat display device is required to be 1.1 mm or less, a cellular phone is required to be 0.5 mm or less, and an IC card is required to be 0.2 mm or less. This is from 1 mm, which is the thickness of a conventional general substrate or the thickness of an IC chip.
The thickness is less than or approximately equal to 0.3 mm.

In order to meet this demand, the substrate and the I
Both C chips need to be thin, for example, each must be less than half the allowable thickness. However, in the bare chip mounting method disclosed in Japanese Patent Application Laid-Open No. 6-37140, a hole penetrating from the front surface to the rear surface is formed on the substrate having the wiring formed on the front surface in order to form a path from the rear surface side to the wiring. Therefore, when the number of bare chips is large, when the mounting density is large, or when the substrate is large, there is a problem that the strength of the substrate is reduced and the substrate is easily broken.

The present invention solves the above-mentioned problems. For example, as in the case of mounting a switching element of an active matrix substrate of a large flat display device,
When the number of chips is extremely large, such as when TFT transistors are mounted on the active matrix substrate of a large flat display device having several hundreds of thousands to several megapixels, or when the mounting density within the substrate is increased, the substrate dimensions are reduced. When the size is increased, for example, even if the substrate dimensions are about 360 mm × 465 mm, it is an object to realize a chip mounting method in which the strength of the entire substrate after chip mounting does not decrease.

[0006]

A bare chip mounting board according to claim 1 of the present invention comprises a molded board having holes and wirings larger than the outer dimensions of the bare chip, wherein the bare chip is buried in the molded hole, A bare chip electrode is connected to a corresponding wiring portion on the substrate side from the front surface side of the substrate.

According to a second aspect of the present invention, there is provided a bare chip mounting board according to a second aspect of the present invention, wherein the bare chip mounting board has a hole and a wiring which are larger than the outer dimensions of the bare chip. It is characterized by being tapered.

[0008] A bare chip mounting board according to a third aspect of the present invention is characterized in that the bare chip has a spherical shape.

In the active matrix substrate according to a fourth aspect of the present invention, the bare chip is buried in a hole larger than the outer dimension of the bare chip, and is connected to the corresponding bus line wiring of the chip electrode from the front surface side of the substrate. It is characterized by.

In the bare chip mounting method according to the fifth aspect of the present invention, when connecting the electrode pads of the bare chip to the wiring portion of the substrate, the substrate is heated to a temperature higher than that of the bare chip.
The chip is inserted into a hole larger in size than the chip, and is mounted on a substrate.

The operation of the above configuration will be described below.

In the bare chip mounting board having such a configuration and the mounting method using the same, the chip is mounted by being buried in a hole provided in the board. Thus, the total thickness of the substrate or the like on which the chip is mounted is not the sum of the thicknesses of the substrate and the chip, but is basically determined by the sum of the substrate thickness and the electrode thickness. Therefore, the total thickness of the board after mounting does not depend on the chip thickness, but becomes the board thickness before mounting. Therefore, the substrate strength after the bare chip mounting does not decrease as compared with the substrate strength before the mounting.

[0013]

Embodiments of the present invention will be described below.

(Embodiment 1) An embodiment of the bare chip mounting method of the present invention will be described. FIG. 1 is a group of cross-sectional views for explaining the processing procedure, and FIGS.
Each section is shown in chronological order up to. Here, 1 is a molded substrate,
2 is a wiring, 3 is a bare chip, 5 is a connection electrode (may be a bump), 20 is a small hole, and 50 is a resin.

First, in step 1 (see FIG. 1A), a specific example of the substrate 1 on which the bare chip 3 is mounted is a polyethersulfone film (hereinafter abbreviated as PES) or a light-transmitting material. It is a plastic substrate such as a thermosetting epoxy resin. Its thickness is, for example, 1.
1 mm. The small holes 20 which can be called dents or grooves are dents or grooves molded using a molding die. Other heat-resistant plastic resins that can be molded include polyacetal (POM) resin and polybutylene terephthalate (PB).
T) Resin, liquid crystal polymer (LCP) resin, polyphenylene sulfide (PPS) and the like can be used.

Next, in step 2 (see FIG. 1B), the wiring 2 is formed on the surface of the substrate 1 by sputtering or printing a conductive paste. In the molded substrate 1 in which a hole and a wiring larger than the outer dimension of the bare chip are formed in the bare chip mounting substrate, a bare chip mounting substrate in which a part of the wall of the hole 20 of the molded substrate in which the wiring is formed is tapered may be used. When the bare chip mounting substrate shown in FIG. 1A is used, in the next step, when the wiring 2 is formed on the surface of the substrate 1 by sputtering or printing of a conductive paste, a part of the hole wall is tapered. Therefore, even if the film thickness of the wiring is about 200 nm, the step coverage with respect to the cross section is good, so that the disconnection failure does not occur, and the electrode material cost and the dimensional accuracy of the processing can be significantly improved. Was.

For example, the wiring material is a four-layered wiring of Cu, Ni and Au with Ti and Cr as bases, and the total thickness is 200 nm as the degree of taper is steeper. If the thickness is not increased in the range of up to 1000 nm, the disconnection failure rate increases. This is a phenomenon caused by the relationship between the disconnection defect and the dimensional accuracy of the processing due to the step coverage in the process of being formed by patterning, etching, or the like using a photoresist thereafter.

The wiring 2 is a four-layered wiring of Cu, Ni and Au with Ti and Cr as bases, and the total thickness thereof is 20
It is 0 nm to 1000 nm. Then photoresist 4
It is formed by patterning, etching, or the like using the above method. The position corresponds to the arrangement of the electrodes of the bare chip to be mounted. FIG. 1B is a cross-sectional view of the pattern of the wiring 2 formed by the etching process. Normal,
Its thickness is from 200 nm to 1000 nm.

In step 3 (see FIG. 1C), the bare chip 3 is inserted into the hole 20. The thickness of the bare IC chip 3 is 0.5 mm. Positioning is performed so that the electrodes for external connection are in contact with the connection portions of the corresponding electrodes, and the bare chip 3 is inserted into the hole 20.

When the bare chip 3 is inserted, for example, if the substrate 1 is heated to 100 ° C. to 200 ° C. and the substrate is heated to a temperature higher than that of the bare chip, the hole 20 becomes larger than the dimension processed by etching. In this case, the clearance when the bare chip 3 is inserted into the hole 20 is increased, and the productivity at the time of mounting is improved.

In step 4 (see FIG. 1D), the electrodes for external connection are positioned so as to be in contact with the connection portions of the corresponding bump-shaped convex electrodes, and these are connected by a conductive adhesive or the like. You.

In step 5 (see FIG. 1E), finally,
The hole 20 is filled with an insulating resin 50 such as a silicon resin, and the bare chip 3 is protected by waterproofing, heat dissipation, and the like in addition to electrical insulation and mechanical holding. Alternatively, the bare chip 3 is protected by coating the silicon resin 50 or the like, and waterproofing or dissipating heat in addition to electrical insulation and mechanical holding.

In FIG. 1, the cross-sectional views are shown for clarity. Thus, the bare chip 3 is embedded in the substrate 1. Therefore, the thickness of the entire substrate after the bare chip mounting is equal to the sum of the thickness of the substrate 1 and the thickness of the wiring 2 and is only about 1.1 to 1.2 mm. The 0.5 mm thickness of the bare IC chip has no effect on the overall thickness.

The bare chip 30 has a diameter of 1.0 m.
m or less spherical silicon semiconductor IC chip 31 may be used. FIG. 3 is a sectional view showing one embodiment of a mounting method using the spherical silicon semiconductor IC bare chip 31 of the present invention. Also in such a case, it is completely buried in the hole 20. The substrate on which the spherical chip 31 is mounted needs to have a spherical cross section. In order to obtain such a cross-sectional structure, the dent or groove used in the first embodiment is circumscribed with the spherical chip 31. It molds using a molding die so that it may become the cross section of the circular arc. In order for the hole 20 serving as a recess or groove to have an arc-shaped cross section, a method of molding a plastic resin using a molding die requires securing dimensional accuracy, reducing substrate cost, and increasing the size. This method is suitable for the request of performing the above.

(Embodiment 2) An embodiment of a method for manufacturing an active matrix substrate for a liquid crystal display device using the bare chip mounting method of the present invention will be described. FIG. 2 is a group of cross-sectional views for explaining the processing procedure, and shows each cross-section in a time series from (a) to (e). Here, 1 is a resin substrate, 40 is a source or gate bus line wiring, 3
Reference numerals 0 and 31 denote TFT (switching) bare chips, 5 denotes connection electrodes (may be bumps), 20 denotes small holes, 5
0 is a resin.

In step 1 (see FIG. 2A), it is a sectional view of the molded resin substrate on which the bare chip 3 is mounted. The resin substrate 10 is a plastic substrate such as a polyethersulfone film (hereinafter abbreviated as PES) or a translucent thermosetting epoxy resin. Its thickness is, for example, 1.
1 mm. The small holes 20 which can be called dents or grooves are dents or grooves molded using a molding die.

First, in step 2 (see FIG. 2 (b)), a source or gate bus line wiring 40 is formed on the surface of the molded resin substrate 10 on which the bare chip 3 is mounted by using Ti, Cr and Cu, Ni and Au. It is formed by four-layer continuous sputtering. Its thickness is between 200 nm and 1000 nm. After that, patterning using photoresist 4
It is formed by an etching process or the like. The position corresponds to the arrangement of the electrodes of the switching (TFT) bare chip 30 to be mounted.

Next, in step 3 (see FIG. 2 (c)), the wiring 40 formed on the surface of the substrate 10 by etching or the like, the wiring for external connection and the electrode 40 correspond to the corresponding connection. The alignment is performed so as to be in contact with the portion 5, and the switching (TFT) bare chip 30 is inserted into the hole 20.

When the switching (TFT) bare chip 30 is inserted, for example, if the substrate 1 is heated to 100 ° C. to 200 ° C. to heat the substrate to a higher temperature than the bare chip, the hole 20 is processed by etching. When the bare chip 30 is inserted into the hole 20 in order to enlarge the size larger than the size, the clearance is increased and the productivity at the time of mounting is improved.

In step 4 (see FIG. 2D), the external connection electrodes are aligned so as to be in contact with the connection parts of the corresponding electrodes, and the connection parts 5 made of a conductive adhesive are used for external connection. And the bus line of the TFT active matrix substrate and the electrode of the switching (TFT) bare chip 30 are connected.

In step 5 (see FIG. 2E), finally,
The hole 20 is filled with an insulating resin 50 such as a silicon resin, and the bare chip 3 is protected by waterproofing, heat dissipation, and the like in addition to electrical insulation and mechanical holding. Alternatively, the bare chip 3 is protected by coating the silicon resin 50 or the like, and waterproofing or dissipating heat in addition to electrical insulation and mechanical holding.

FIG. 2 is shown for clarity of comparison between the sectional views. In this way, the switching (TFT) bare chip 30 and the diameter of 1.0 mm
The following spherical TFT bare chip 31 is embedded. Therefore, the thickness of the entire substrate after the bare chip mounting is equal to the sum of the thickness of the substrate 1 and the thickness of the source or gate bus line wiring 40, and is about 1.1 to 1.2 mm. The dimensions of the switching (TFT) bare chip 30 and the spherical TFT bare chip 31 having a diameter of 1.0 mm or less do not affect the overall thickness at all. In this manner, on the substrate having the source or gate bus line wiring 40 formed on the surface thereof, a hole larger than the outside dimension of the chip is provided directly below a part of the wiring portion from the surface side, and the chip is inserted into the hole. And connected to the corresponding source or gate bus line wiring 40 of the chip electrode in the hole 20 on the substrate surface side to obtain an active matrix substrate used for a large-sized liquid crystal display device.

A case where a spherical TFT bare chip 31 having a diameter of 1 mm or less is used as the bare chip 30 will be described. FIG. 3 is a sectional view showing one embodiment of a mounting method using the spherical TFT bare chip 31 of the present invention. Also in such a case, it is completely buried in the hole 20. Spherical tip 3
The board on which 1 is mounted must have a spherical cross section,
In order to obtain such a cross-sectional structure, the concave or groove used in the second embodiment is molded using a molding die so as to have an arc-shaped cross-section circumscribing the spherical chip 31.

In order for the dent or groove to have an arc-shaped cross section, a method of molding a plastic resin using a molding die is to ensure the processing dimensional accuracy of the hole, to reduce the cost of the substrate, This is a suitable method for requests such as increasing the size.

(Embodiment 3) An embodiment of a method for manufacturing a light emitting diode (hereinafter referred to as LED) array substrate using the bare chip mounting method of the present invention will be described. Since the method is substantially similar to the method for manufacturing an active matrix substrate for a liquid crystal display device using the bare chip mounting method described in Embodiment 2, an example thereof will be repeatedly described with reference to FIGS. FIG. 2 is a group of cross-sectional views for explaining the processing procedure, and shows each cross-section in a time series from (a) to (e). Here, 1 is a substrate, 40 is an anode or cathode wiring, 30 and 31 are LED bare chips, 5 is a connection electrode (may be a bump), 20 is a small hole, and 50 is a resin.

First, in step 1 (see FIG. 2A), L
A specific example of the resin substrate 1 on which the ED bare chip 30 is mounted is a plastic substrate such as a polyether sulfone film (hereinafter abbreviated as PES) or a translucent thermosetting epoxy resin. Its thickness is, for example, 1.1 mm. The small holes 20 which can be called dents or grooves are dents or grooves molded using a molding die.

Next, in step 2 (see FIG. 2B), the source or gate bus line wiring 40 is formed on the surface of the substrate 1.
Is formed by two-layer continuous sputtering of a Cu electrode with Ti and Cr as bases. Its thickness is 200nm ~ 10
00 nm. Thereafter, the photoresist 4 is formed by patterning, etching, and the like. The position corresponds to the arrangement of the electrodes of the LED bare chip 30 to be mounted.

FIG. 2B is a sectional view of the anode or cathode wiring 40 after being formed by an etching process or the like. Usually its thickness is from 200nm to 1000n
m.

In step 3 (see FIG. 2C), the LED bare chip 30 is inserted into the hole 20. Positioning is performed so that the external connection electrodes are in contact with the connection portions of the corresponding bump-shaped convex electrodes. In the case of the LED bare chip 30, its thickness is 0.3 to 0.5 mm,
It is completely buried in the hole 20. LED bare chip 3
A spherical LED chip 31 having a diameter of 1.0 mm or less as 0
Is completely buried in the hole 20.

In step 4 (see FIG. 2D), the connection electrodes 5 for external connection are positioned so as to be in contact with the connection portions of the corresponding bare chip electrodes, and are connected to the connection electrodes 5 by a conductive adhesive or the like. Connected. For example, 100
C. to 200.degree. C., and pressurize with a weight of about 100 g per bump for about 1 to 2 seconds.

In step 5 (see FIG. 2 (e))
An insulating resin 50 such as silicon is filled in the hole 20,
The bare chip 3 is protected by waterproofing, heat dissipation, and the like in addition to electrical insulation and mechanical holding. Alternatively, by coating a resin 50 such as polyimide, the bare LED chip 30 of the LED rectangular parallelepiped is protected by waterproofing and heat dissipation in addition to electrical insulation and mechanical holding.

The bare chip 30 has a diameter of 0.5 mm.
May be used. FIG. 3 is a sectional view showing one embodiment of a mounting method using the spherical LED bare chip of the present invention. Also in such a case, it is completely buried in the hole 20. The substrate on which the spherical chip 31 is mounted needs to have a spherical cross section. In order to obtain such a cross-sectional structure, the dent or groove used in the first embodiment is circumscribed with the spherical chip 31. It molds using a molding die so that it may become the cross section of the circular arc.

In order for the dent or groove to have an arc-shaped cross section, a method of molding a plastic resin using a molding die requires securing dimensional accuracy, reducing substrate cost, and increasing the size. This is a suitable method for the request of the point to be performed. By providing the recess or groove with an arc-shaped cross section, better protection against the spherical LED bare chip 31 can be achieved.

Thus, the LED bare chip 30 and the spherical LED bare chip 31 are embedded in the substrate 1.
Therefore, the thickness of the whole board after mounting the bare chip is
Is equal to the sum of the thickness of the anode or cathode wiring 40 and about 1.1 to 1.2 mm. LED bare chip 30 and spherical LED bare chip 31 having a diameter of 1 mm or less
Has no effect on the overall thickness. In this way,
On the surface of the substrate on which the anode or cathode wiring 40 is formed, a hole larger than the outer dimension of the chip is provided immediately below a part of the wiring portion from the surface side, and the chip is buried in the hole, and In the hole 20 on the side, the chip electrode was connected to the corresponding anode or cathode wiring 40 of the chip electrode. Thus, a light emitting diode array substrate used for a large-sized display device was obtained.

[0045]

As described above, in the bare chip mounting board and the mounting method of the present invention, the chip is mounted by being buried in the hole provided in the board. Thus, the total thickness of the substrate or the like on which the chip is mounted is not the sum of the thicknesses of the substrate and the chip, but is basically determined by the sum of the substrate thickness and the electrode thickness. Therefore, the thickness of the substrate can be made substantially equal to the thickness of the substrate irrespective of the thickness of the chip, that is, substantially equal to the thickness of the substrate before mounting. Further, even when the number of bare chips mounted on the substrate after the mounting of the bare chip is increased, or when the mounting density is large and the size of the substrate is large, the effect that the strength of the substrate is not reduced is exerted.

If a part of the hole wall is inclined in a tapered shape, no disconnection failure occurs, and the electrode film thickness can be reduced, so that the cost of material used as an electrode material can be reduced and the effect of improving the dimensional accuracy at the time of processing can be reduced. Play.

When the bare chip is inserted, if the substrate is heated to a temperature higher than that of the bare chip, the hole becomes larger than the formed dimension, so that the clearance for inserting the bare chip is increased, and the productivity at the time of mounting is reduced. It has the effect of improving.

In order to obtain a cross-sectional structure in which the cross section of the substrate on which the spherical chip is mounted becomes an arc, an arc-shaped cross section in which a dent or groove-shaped hole circumscribes the spherical chip is molded using a molding die. And realize it. The molding method is effective in securing the accuracy of the cross-section processing dimension of the arc shape, reducing the cost of the substrate, and increasing the size.

In order to protect the spherical chip, the recess or groove is formed to have an arc-shaped cross section, so that the amount of resin used can be reduced and the effect of improving cost performance can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a process flow of a bare chip mounting method according to an embodiment of the present invention and a mounting board.

FIG. 2 is a sectional view group of an active matrix or light emitting diode array substrate using one embodiment of the bare chip mounting method of the present invention.

FIG. 3 is a cross-sectional view showing a part of a mounting portion of a mounting board using the spherical bare chip of the present invention.

FIG. 4 is a cross-sectional view of a bare chip mounting state in which a part of a hole wall is tapered.

FIG. 5 is a cross-sectional view of a bare chip mounting state according to another conventional mounting method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Resin board 2 Wiring 3 Bare chip 5 Connection electrode 6 Bare chip electrode 7 Source or gate electrode of TFT bare chip or LED anode or cathode electrode 20 Hole 30 TFT bare chip or LED bare chip 31 Spherical bare chip (silicon semiconductor IC or spherical bare chip of TFT or LED) 40) TFT source or gate bus line wiring or LED anode or cathode wiring 50 Resin

Continued on front page F-term (reference) 4M109 AA01 BA04 BA05 CA02 CA06 DA03 DA09 DB16 DB17 EA10 GA03 5E336 AA08 BB01 BB12 BB16 BC26 CC38 CC57 CC58 EE08 EE20 GG01 GG12 GG16 GG26

Claims (5)

[Claims] In a molded substrate having holes and wirings larger than the outer dimensions of a bare chip, a bare chip is buried in the molded hole, and a bare chip electrode and a corresponding wiring portion on the substrate are formed from the surface of the substrate. A bare chip mounting board characterized by being connected. 2. A molded substrate in which holes and wirings larger than the outer dimensions of the bare chip are formed in the bare chip mounting substrate, wherein a part of the hole wall of the molded substrate in which the wirings are formed is tapered. Item 2. A bare chip mounting substrate according to item 1. 3. The bare chip mounting board according to claim 1, wherein the bare chip has a spherical shape. 4. The mounting according to claim 1, wherein the bare chip is buried in a hole larger than the outer dimension of the bare chip, and is connected to a corresponding bus line wiring of the chip electrode from the front surface side of the substrate. Active matrix substrate using a substrate. 5. When connecting the electrode pad of the bare chip to the wiring portion of the substrate, the substrate is heated to a temperature higher than that of the bare chip, the chip is inserted into a hole larger in size than the chip, and mounted on the substrate. A bare chip mounting method using the mounting board according to claim 1.