JP2001237981A - Line selecting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform various kinds of necessary processings only by a power source liquid from a telephone line without reducing a function or convenience. SOLUTION: In a CPU 10, a clock mode is selected in a stand-by state and a program processing operation is stopped. A sub-clock mode with a low-speed clock is selected in an incoming state where an incoming detection signal 25A is inputted. When response by a telephone terminal is detected during an incoming call, a main clock mode with a high-speed clock is selected. The main clock mode is continued till the download of line selecting information is completed when a start signal is detected within a prescribed detection time t from a main clock mode start and, then, the sub-clock mode is selected till the call is ended from the point of time when the detection time t elapses unless the start signal is detected within the detection time t.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line selection device, and more particularly to a line selection device which is connected between a telephone line and a two-wire telephone terminal and has a low call charge based on a dial pulse signal and a PB signal from the telephone terminal. The present invention relates to a line selection device that selects a line service and performs automatic transmission.

[0002]

2. Description of the Related Art In this type of line selection apparatus, an arithmetic processing circuit (CPU) is provided to perform general line control processing such as incoming call detection, answer detection, outgoing call, and telephone call, and to download line selection information from a center. It performs complex and advanced processing such as download processing for the purpose.

[0003]

However, in such a conventional line selection apparatus, since the AC power supply is used as the operation power supply, it cannot be installed in a place where there is no AC power supply, and the installation place is restricted, and the two-wire circuit is not used. Even when not using the telephone terminal of the formula (analog), the AC power is consumed by the standby current. Further, the power supply circuit also has a relatively large configuration, which causes an increase in cost and an increase in the size of the device.
The present invention is to solve such a problem,
It is an object of the present invention to provide a line selecting device capable of performing various necessary processes only with a power supply supplied from a telephone line without reducing functions and convenience.

[0004]

In order to achieve the above object, a line selecting apparatus according to the present invention comprises an arithmetic processing circuit for selecting and operating one of a plurality of operation modes having different power consumptions. An incoming call detection circuit that outputs an incoming call detection signal to an arithmetic processing circuit when an incoming signal from a telephone line is detected, and outputs a terminal loop detection signal to an arithmetic processing circuit when a terminal loop current to a telephone terminal is detected. A terminal loop detection circuit, and a start signal detection that outputs a start detection signal to an arithmetic processing circuit when a start signal sent via the telephone line is detected after the telephone terminal responds to an incoming call from the telephone line. And an operation processing circuit selects an operation mode based on at least one of an incoming call detection signal, a terminal loop detection signal, and a start-up detection signal.

The operation modes of the arithmetic processing circuit include a first operation mode in which processing based on a program is performed at a low speed using a first clock having a relatively low frequency, and a second operation mode in which a frequency higher than the first clock is used. A second operation mode in which a program-based process is performed at high speed using a clock and a third operation mode in which the program-based process is stopped may be provided. In this case, in a standby state in which neither the incoming call detection signal nor the terminal loop detection signal is input, the third operation mode with the lowest power consumption may be selected to stop the program processing operation.

In the incoming call state in which the incoming call detection signal is input, the first operation mode in which the power consumption is small due to the low processing capacity is selected, and when the terminal loop detection signal is input during the incoming call, the comparison is made. If the second operation mode having high processing capacity is selected and a start detection signal is input until a predetermined detection period elapses after the start of the second operation mode, the download of the line selection information is completed. The second operation mode may be continued. Furthermore, the second
If the activation detection signal is not input until a predetermined detection period elapses from the start of the operation mode of the first operation mode, the first power consumption is reduced by the low processing capacity until the terminal loop detection signal is stopped after the detection period elapses. Mode may be continued.

[0007]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a line selection device according to an embodiment of the present invention. In FIG. 1, a line selection device 1 is connected between a telephone line 2 from an exchange (not shown) and a two-wire (analog) telephone terminal 4, and is connected to the telephone terminal 4 via the terminal line 3. Connected. In the line selection device 1, 12 is a terminal power supply circuit for supplying power to the telephone terminal 4 via the terminal line 3, 11 is a line relay for switching and connecting either the telephone line 2 or the terminal power supply circuit 12 and the terminal line 3, 13 Is the telephone terminal 4 of the line relay 11
This is a terminal loop detection circuit that is provided on the side and detects a terminal loop current flowing through the terminal line 3 and outputs a terminal loop detection signal 13A.

Reference numeral 15 is connected to a rectified output 14A of a diode bridge 14 connected to both ends of the telephone line 2. The line 15 closes the telephone line 2 to perform line capture and output a dial pulse signal (DP) signal. This is a line capture DP transmission circuit. The line capture DP transmission circuit 15 closes the loop based on the line capture DP transmission signal 15A, and outputs a part of the loop current flowing through the telephone line 2 when the loop is closed, as a loop connection output 15B. Further, it outputs a dial pulse signal corresponding to the dial number specified by the line capture DP transmission signal 15A.

Reference numeral 16 denotes a high impedance circuit (hereinafter referred to as an HI-Z circuit) connected to the loop closed output 15B from the line capture DP sending circuit 15, and 17 denotes an HI-Z circuit 1.
6, an electrolytic capacitor for charging a part of the loop closed output 15B obtained as the terminal supply power supply _VA , a high resistance 14R for charging the rectified output 14A of the diode bridge 14 with a small current to the electrolytic capacitor, and 14D. Is a diode for preventing the charging current from flowing back through the high resistance 14R.

Reference numeral 20 denotes a charged state of the electrolytic capacitor 17.
Terminal power supply V_ATo output to the terminal power supply circuit 12
Diode for prevention, 18 is terminal power supply V_ACharge the power
Charging the pond 19 and operating power V required for each circuit
_CCAnd the terminal supply power V _ARechargeable battery according to the drop
19 operating power supply V_CCIs a power supply circuit for supplying the power. to this
Thus, the line selection device 1 of the present invention
Operation is possible only with a limited power supply capacity, and no AC power supply is required
Becomes

A PB receiving circuit 21 is connected to the loop-closing output 15B and receives a PB signal from the telephone line 2.
Is a PB transmission circuit for transmitting a PB signal to the telephone line 2 via the HI-Z circuit 16; 24 is a tone output circuit for outputting various tones to the telephone terminal 4 via the terminal power supply circuit 12;
23 is a relay control circuit for controlling the line relay 11, 25
Is an incoming detection circuit for detecting an incoming signal from the telephone line 2;
Reference numeral 6 denotes a reverse detection circuit for detecting a reverse signal indicating a response from the telephone line 2 when making a call, and reference numeral 27 denotes a storage circuit for storing line selection information used for line selection.

Reference numeral 10 denotes a CPU (arithmetic processing circuit) for controlling each circuit section in the line selection device 1, and operates inside the CPU 10 independently of a program operation for performing various processes according to a predetermined program. A clock circuit 10A is provided. 28 is a main clock (first clock) having a relatively high frequency, and 29 is this main clock 28
The sub-clock (second clock) having a lower frequency is supplied to the CPU 10.

FIG. 2 is an explanatory diagram showing the operation mode of the CPU. The CPU 10 has three operation modes shown in FIG. 2 as operation modes. In the main clock mode (second operation mode), program processing is executed at high speed based on the main clock 28. In the sub clock mode (first operation mode), the sub clock 29
Program processing is executed at a low speed based on. On the other hand, in the clock mode (third operation mode), only the internal clock circuit 10A performs the clocking operation based on the subclock 29. The clock circuit 10A operates based on the sub clock 29 in the main clock mode and the sub clock mode as in the clock mode.

The power consumption of the CPU 10 depends on the operation clock. In the main clock mode with the highest frequency, the power consumption increases, and in the sub-clock mode with a lower frequency, the power consumption decreases. In the clock mode in which no program processing is performed, the clock circuit 10
Since only the time counting operation by A, that is, the pulse counting operation, is performed, the power consumption becomes very small.

FIG. 3 is a state transition diagram of the CPU operation mode. In the program processing in the main clock mode 31,
By resetting the clock bit for managing the operation state inside the CPU 10, the main clock mode 3
1 to the subclock mode 32. Conversely, by setting the clock bit in the program processing in the sub clock mode 32, the sub clock mode 3
2 to the main clock mode 31. Also, in the program processing in the sub clock mode 32, the CPU 10
By setting the clock bit for managing the operation state internally, the sub clock mode 32 to the clock mode 3
Can move to 3.

In the clock mode 33, since the program processing is stopped, the clock bit cannot be reset. In this case, the clock mode 33 can be returned to the sub clock mode 32 by an external interrupt from outside the CPU 10 or a clock interrupt from the clock circuit. Therefore, to make a transition between the main clock mode 31 and the clock mode 33, the transition is made via the sub clock mode 32. The operation starts from the sub clock mode 32 when the CPU 10 is reset or when the power is turned on.

Next, referring to FIG. 4, a description will be given of an operation sequence of transition from incoming call to telephone call as an operation of the present invention. FIG. 4 is a timing chart showing the incoming / call operation of the present invention. Before time T1, the telephone terminal 4 is in a standby (idle) state where the telephone terminal 4 is not used and there is no incoming call.
The PU 10 has shifted to the clock mode, and its program operation has stopped. At this time, both ends of the telephone line 2 need to be kept at a high impedance, and only a small charging current of 48 μA or less can be obtained via the high resistance 14R and the diode 14D.

At time T1, when an incoming signal arrives at the telephone line 2, the incoming detection circuit 25 detects this incoming signal and outputs an incoming detection signal 25A to the CPU 10. The incoming detection signal 25A is connected to an external interrupt port of the CPU 10 in advance. Therefore, the incoming call detection signal 25
A becomes an external interrupt, and the CPU 10 shifts from the clock mode to the subclock mode. Then, an incoming call detection process is executed based on a predetermined program. In this process, the time (time stamp) when the incoming call is detected is stored, and the process returns to the original clock mode. At this time, since the sub clock mode is set in a state where only a small current is obtained from the telephone line 2, the terminal supply voltage _{VA which} is the source of the operating power supply V _CC of the CPU 10 is in a discharged state.

In this manner, every time an incoming signal arrives, the CPU 10 shifts to the subclock mode to perform an incoming call detection process. The incoming signal is supplied to the telephone terminal 4 via the line relay 11 and the terminal line 3, and the telephone terminal 4 performs ringing display. Subsequent time T2
In the case where a response operation is performed on the telephone terminal 4 and a line loop is formed, the loop formation is detected by the terminal loop detection circuit 13 and the terminal loop detection signal 13A
0.

This terminal loop detection signal 13A
It is connected to the external interrupt port of U10. Therefore, the terminal loop detection signal 13A becomes an external interrupt, and the CPU 10 shifts from the clock mode to the subclock mode. Then, a response process is executed based on a predetermined program. In the response process, first, the mode shifts from the sub clock mode to the main clock mode, and the telephone line 2 is captured by the line capture DP transmission circuit by the line capture DP transmission signal 15A. As a result, a line loop current of 20 mA to 120 mA is obtained, and this is charged in the electrolytic capacitor 17 through the HI-Z circuit 16, so that the terminal supply voltage V _A
Is charged.

Then, a start-up signal detection timer, which expires in a predetermined detection period t, is started. When the line selection information is downloaded from the center, the start signal is a signal transmitted from the center within a detection period t after the incoming call response, and a PB signal is usually used. Therefore,
The necessity of the download process is determined depending on whether or not the activation signal is detected within the detection period t.

If the start signal is not detected by the PB receiving circuit 21 before the detection period t elapses, the CPU 10
In this case, it is determined that the incoming call is a general incoming call that does not require the download processing of the line selection information, and the process shifts to the subclock mode because the processing is not so complicated and does not require advanced processing until the end of the call. Since the line loop current is obtained during the period from this point to the end of the call, the terminal supply voltage _VA is maintained in a charged state, and charging can be performed efficiently.

At a subsequent time T3, if the line loop current is interrupted in response to the call termination operation by the telephone terminal 4 or the other party, this is detected by the terminal loop detection circuit 13 and the CP is detected by the terminal loop detection signal 13A.
U10 is notified. At this time, the CPU 10 operates in the sub clock mode, and executes a predetermined call termination process based on the terminal loop detection signal 13A. The mode shifts to the clock mode in the last processing of the end call processing. This allows
Return to the standby (idle) state before time T1 described above,
The battery is charged by a very small current.

Next, with reference to FIG. 5, a description will be given of an operation sequence of shifting from incoming call to download as an operation of the present invention. FIG. 5 is a timing chart showing the incoming / download operation of the present invention. The operation before time T2 is the same as that in FIG. 4 described above, and a description thereof will be omitted. At time T2, when a response operation is performed on the telephone terminal 4 to form a line loop, the loop formation is detected by the terminal loop detection circuit 13, and the terminal loop detection signal 1
3A is supplied to the CPU 10. The terminal loop detection signal 13A becomes an external interrupt, the CPU 10 shifts from the clock mode to the subclock mode, and a response process is executed based on a predetermined program.

In response processing, first, the sub-clock mode
To main clock mode, and seize telephone line 2
You. This provides the line loop current and the
Pressure V _AIs charged. Subsequently, the time is set in the detection period t.
Start the startup signal detection timer that goes up. detection
By the time t has elapsed, the start signal is output from the PB receiving circuit 21.
Is detected by the CPU 10 and notified to the CPU 10,
It is necessary to download the line selection information
And complicated and advanced processing is required until the end of the call
Therefore, the main clock mode is maintained. After this
The line loop current is not
The terminal supply voltage V_AIs maintained in a charged state
And can be charged efficiently.

At a subsequent time T3, when the line loop is interrupted by the telephone terminal 4 or the other party in response to the call termination operation, the terminal loop detection circuit 13
Is detected by the terminal loop detection signal 13A.
0 is notified. At this time, the CPU 10 operates in the main clock mode.
A predetermined call termination process is executed based on 3A. In the last processing of the end call processing, the mode shifts to the clock mode via the sub clock mode. As a result, the state returns to the standby (idle) state before the time T1 described above, and the state is charged with a very small current.

[0027]

As described above, according to the present invention, in an arithmetic processing circuit which operates by selecting any one of a plurality of operation modes having different power consumption, at least the incoming call detection signal and the terminal loop detection signal And the operation mode is selected based on one of the start detection signal and the start detection signal. Therefore, the arithmetic processing circuit can be operated in an operation mode corresponding to a necessary process in various operation states of the line selection device, and various necessary processes are supplied from the telephone line without reducing functions and convenience. Power consumption alone, and wasteful power consumption can be greatly reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of a line selection device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram illustrating a configuration example of a high-voltage power supply circuit of FIG. 1;

FIG. 3 is a state transition diagram of a CPU operation mode.

FIG. 4 is a timing chart showing an incoming call / call operation.

FIG. 5 is a timing chart showing an incoming / download operation.

[Explanation of symbols]

1. Line selection device, 2. Phone line, 3. Terminal line, 4.
Telephone terminal, 10 CPU, 10A clock circuit, 11 line relay, 12 terminal power supply circuit, 13 terminal loop detection circuit, 13A terminal loop detection signal, 14 diode bridge, 14A rectified output, 14R high Resistance, 14D
... Diode, 15 ... Line capture DP transmission circuit, 15A ...
Line capture DP transmission signal, 15B ... loop closed output, 16
... High impedance (HI-Z) circuit, 17 ... Electrolytic capacitor, 18 ... Power supply circuit, 20 ... Diode, 21 ... P
B receiving circuit, 22 PB sending circuit, 23 tone output circuit, 24 relay control circuit, 25 incoming call detecting circuit, 26
... Reverse detection circuit, 27 ... Storage circuit, 28 ... Main clock, 29 ... Sub clock.

Continuing from the front page (72) Inventor Masaru Shinouchi 2-3-2 Shimomeguro, Meguro-ku, Tokyo Inside the Tamura Electric Works (72) Inventor Masahiko Makino 2-3-2 Shimomeguro, Meguro-ku, Tokyo Stock (72) Inventor Hiroryu Matsuda 4-9-1, Shibaura, Minato-ku, Tokyo Shibaura Square Air Building Tokyo Communication Network Co., Ltd. (72) Inventor ▲ Taka ▼ Bridge Yoshito Shibaura, Minato-ku, Tokyo No. 9-25 Shibaura Square Air Building Tokyo Communication Network Co., Ltd. F-term (reference) 5K027 BB17 EE15 EE16 5K036 BB04 CC02 HH08 KK07 5K037 AA10 AA13 CA01 DA03 5K101 KK18 LL01 MM01 PP06 QQ11 RR04

Claims (6)

[Claims] A telephone line is connected between a telephone line and a two-wire telephone terminal, performs line selection processing by referring to line selection information based on a dial signal output from the telephone terminal, and performs a line selection process via the telephone line. A line selection device for performing a download process of receiving and storing the line selection information sent from the center, and selecting and operating one of a plurality of operation modes having different power consumptions; An incoming call detection circuit that outputs an incoming call detection signal to the arithmetic processing circuit when an incoming call signal from the telephone line is detected; and an arithmetic processing of the terminal loop detection signal when a terminal loop current to the telephone terminal is detected. A terminal loop detection circuit that outputs to a circuit, and detects an activation signal sent via the telephone line after the telephone terminal responds to an incoming call from the telephone line. A startup signal detection circuit that outputs a startup detection signal to the arithmetic processing circuit in the case, wherein the arithmetic processing circuit is configured to perform the operation mode based on at least one of the incoming call detection signal, the terminal loop detection signal, and the startup detection signal. A line connection device characterized by selecting: 2. The line connection device according to claim 1, wherein the arithmetic processing circuit performs a low-speed program-based process using a relatively low-frequency first clock as the operation mode. Modes, a second operation mode in which a program-based process is performed at a high speed using a second clock having a higher frequency than the first clock, and a third operation mode in which the program-based process is stopped. A line connection device characterized by the above-mentioned. 3. The line connection device according to claim 2, wherein the arithmetic processing circuit is in a standby state in which neither the incoming call detection signal nor the terminal loop detection signal is input.
A line connection apparatus, wherein the third operation mode is selected to stop the program processing operation. 4. The line connection device according to claim 2, wherein the arithmetic processing circuit selects the first operation mode in an incoming call state in which the incoming call detection signal is being input, and the terminal loop during the incoming call. If a detection signal is input, the second
If the activation detection signal is input until a predetermined detection period has elapsed since the start of the second operation mode, the second operation is performed until the download of the line selection information is completed. A line connection device characterized by continuing a mode. 5. The line connection device according to claim 2, wherein the arithmetic processing circuit selects the first operation mode in an incoming call state in which the incoming call detection signal is being input, and the terminal loop during the incoming call. If a detection signal is input, the second
If the start detection signal is not input until a predetermined detection period has elapsed from the start of the second operation mode, the terminal loop detection signal stops after the detection period has elapsed. A line selecting device for continuing the first mode until the first mode. 6. A telephone line connected between a telephone line and a two-wire telephone terminal, performs line selection processing by referring to line selection information based on a dial signal output from the telephone terminal, and performs a line selection process via the telephone line. A line selection device for performing a download process for receiving and storing line selection information sent from a center, and performing a program-based process at a low speed using a first clock having a relatively low frequency. An operation mode, a second operation mode in which a program-based process is performed at a high speed using a second clock having a higher frequency than the first clock, and a third operation mode in which the program-based process is stopped. An arithmetic processing circuit that operates by selecting any one of the first to third operation modes, and an incoming detection signal when an incoming signal from the telephone line is detected. An incoming call detection circuit that outputs to the arithmetic processing circuit; a terminal loop detection circuit that outputs a terminal loop detection signal to the arithmetic processing circuit when a terminal loop current to the telephone terminal is detected; An activation signal detection circuit that outputs an activation detection signal to the arithmetic processing circuit when an activation signal transmitted via the telephone line is detected after responding to the telephone terminal. In a standby state where neither the incoming call detection signal nor the terminal loop detection signal is input,
The third operation mode is selected to stop the program processing operation, and the first operation mode is selected in an incoming call state in which the incoming call detection signal is input, and the terminal loop detection signal is input during the incoming call. In this case, the second operation mode is selected. If the start detection signal is input until a predetermined detection period elapses from the start of the second operation mode, the download of the line selection information is completed. The second operation mode is continued until the start-up detection signal is not input until the detection period elapses, and if the terminal loop detection signal is stopped after the detection period elapses, the first operation mode is stopped. A line selection device characterized by continuing the above mode.