JP2003174145A5 - - Google Patents

Claims (19)

A plurality of ferroelectric capacitors having a lower electrode, a capacitor insulating film made of a ferroelectric film, and an upper electrode sequentially formed on an interlayer insulating film on a semiconductor substrate, and arranged in a word line direction and a bit line direction A ferroelectric memory device comprising:
An insulating or conductive first hydrogen barrier film provided to cover the plurality of upper electrodes;
The first hydrogen barrier film is formed separately for each capacitor row composed of the plurality of ferroelectric capacitors arranged in one of a word line direction and a bit line direction. Body memory device. A plurality of ferroelectric capacitors having a lower electrode, a capacitor insulating film made of a ferroelectric film, and an upper electrode sequentially formed on an interlayer insulating film on a semiconductor substrate, and arranged in a word line direction and a bit line direction A ferroelectric memory device comprising:
An insulating or conductive first hydrogen barrier film provided to cover the plurality of upper electrodes;
The first hydrogen barrier film is formed in the other direction of the word line direction and the bit line direction in the capacitor row composed of the plurality of ferroelectric capacitors arranged in one direction of the word line direction and the bit line direction. A ferroelectric memory device formed so as to cover a pair of adjacent capacitor rows. An insulating second hydrogen barrier film embedded between the lower electrodes of the plurality of ferroelectric capacitors arranged in one direction among the plurality of ferroelectric capacitors is further provided. The ferroelectric memory device according to claim 1 or 2. 3. The ferroelectric memory device according to claim 1, wherein the upper electrode is formed in common for the plurality of ferroelectric capacitors arranged in the one direction. According to claim 1 or 2, characterized in that it further comprises a third hydrogen barrier film formed conductive between the interlayer insulating film is formed the contact plug and the lower electrode Ferroelectric memory device. A capacitor row composed of the plurality of ferroelectric capacitors arranged in one direction is completely covered by the first hydrogen barrier film, the second hydrogen barrier film, and the third hydrogen barrier film . 6. The ferroelectric memory device according to claim 5 , wherein: Claims said common upper electrode and formed between the first hydrogen barrier film, characterized in that it comprises further the step reducing film for alleviating the step formed on the peripheral portion of said common upper electrode Item 5. The ferroelectric memory device according to Item 4 . The second hydrogen barrier film is made of a Si ₃ N ₄ film, a SiON film, an Al ₂ O ₃ film, a TiO ₂ film, or an oxide film or oxynitride film of an alloy of Ti and Al. The ferroelectric memory device according to claim 3 . The first hydrogen barrier film is a Si ₃ N ₄ film, a SiON film, an Al ₂ O ₃ film, a TiO ₂ film, a TiN film, an alloy film of Ti and Al, or an oxide film of an alloy of Ti and Al. 2. The ferroelectric memory device according to claim 1 , comprising a nitride film or an oxynitride film. The strong hydrogen film according to claim 5 , wherein the third hydrogen barrier film is made of an alloy film of Ti and Al, a nitride film or an oxynitride film of an alloy of Ti and Al, or a TiN film. Dielectric memory device. A plurality of ferroelectric capacitors having a lower electrode, a capacitor insulating film made of a ferroelectric film, and an upper electrode sequentially formed on an interlayer insulating film on a semiconductor substrate, and arranged in a word line direction and a bit line direction A method for manufacturing a ferroelectric memory device comprising:
Forming lower electrodes of the plurality of ferroelectric capacitors on the interlayer insulating film;
Forming a capacitive insulating film on the lower electrode;
Forming an upper electrode on the capacitive insulating film;
An insulating or conductive first hydrogen barrier film covering each of the plurality of upper electrodes, and for each capacitor row comprising the plurality of ferroelectric capacitors arranged in one direction of the word line direction and the bit line direction And a step of forming the ferroelectric memory device separately. A plurality of ferroelectric capacitors having a lower electrode, a capacitor insulating film made of a ferroelectric film, and an upper electrode sequentially formed on an interlayer insulating film on a semiconductor substrate, and arranged in a word line direction and a bit line direction A method for manufacturing a ferroelectric memory device comprising:
Forming lower electrodes of the plurality of ferroelectric capacitors on the interlayer insulating film;
Forming a capacitive insulating film on the lower electrode;
Forming an upper electrode on the capacitive insulating film;
An insulating or conductive first hydrogen barrier film covers a plurality of the upper electrodes, and includes a plurality of ferroelectric capacitors arranged in one direction of a word line direction and a bit line direction. A method of manufacturing a ferroelectric memory device comprising: forming a pair of capacitor rows adjacent to each other in the other of the word line direction and the bit line direction. After the step of forming the lower electrode and before the step of forming the capacitive insulating film, after depositing an insulating second hydrogen barrier film on the interlayer insulating film and the lower electrode, Planarizing the second hydrogen barrier film, and embedding the second hydrogen barrier film between the lower electrodes of the plurality of ferroelectric capacitors arranged in one direction among the plurality of ferroelectric capacitors. 13. The method of manufacturing a ferroelectric memory device according to claim 11 or 12, further comprising: Prior to the step of forming the lower electrode, the method further includes a step of forming a conductive third hydrogen barrier film interposed between the contact plug formed in the interlayer insulating film and the lower electrode. 13. The method for manufacturing a ferroelectric memory device according to claim 11, wherein the ferroelectric memory device is a semiconductor memory device. A capacitor row composed of the plurality of ferroelectric capacitors arranged in one direction is completely covered by the first hydrogen barrier film, the second hydrogen barrier film, and the third hydrogen barrier film . 15. The method of manufacturing a ferroelectric memory device according to claim 14 , wherein Between the step of forming a step of forming a pre-SL upper portion electrode the first hydrogen barrier film, interposed between the before and SL upper portion electrode first hydrogen barrier film, front Stories upper portion 13. The method of manufacturing a ferroelectric memory device according to claim 11 , further comprising a step of forming a step-reducing film that relieves a step formed on the peripheral portion of the electrode. The second hydrogen barrier film is made of a Si ₃ N ₄ film, a SiON film, an Al ₂ O ₃ film, a TiO ₂ film, or an oxide film or oxynitride film of an alloy of Ti and Al. The method of manufacturing a ferroelectric memory device according to claim 15. The first hydrogen barrier film is a Si ₃ N ₄ film, a SiON film, an Al ₂ O ₃ film, a TiO ₂ film, a TiN film, an alloy film of Ti and Al, or an oxide film of an alloy of Ti and Al. The method of manufacturing a ferroelectric memory device according to claim 11 , comprising a nitride film or an oxynitride film. The strong hydrogen film according to claim 14 , wherein the third hydrogen barrier film is made of an alloy film of Ti and Al, a nitride film or an oxynitride film of an alloy of Ti and Al, or a TiN film. A method of manufacturing a dielectric memory device.