JP2013016790A - 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法 - Google Patents

半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法 Download PDF

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Publication number
JP2013016790A
JP2013016790A JP2012130653A JP2012130653A JP2013016790A JP 2013016790 A JP2013016790 A JP 2013016790A JP 2012130653 A JP2012130653 A JP 2012130653A JP 2012130653 A JP2012130653 A JP 2012130653A JP 2013016790 A JP2013016790 A JP 2013016790A
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Japan
Prior art keywords
semiconductor crystal
crystal layer
semiconductor
layer
base substrate
Prior art date
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Pending
Application number
JP2012130653A
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English (en)
Japanese (ja)
Inventor
Masahiko Hata
雅彦 秦
Hisashi Yamada
永 山田
Masashi Yokoyama
正史 横山
Sang Hyun Kim
相賢 金
Mitsuru Takenaka
充 竹中
Shinichi Takagi
信一 高木
Tetsuji Yasuda
哲二 安田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Sumitomo Chemical Co Ltd
University of Tokyo NUC
Original Assignee
National Institute of Advanced Industrial Science and Technology AIST
Sumitomo Chemical Co Ltd
University of Tokyo NUC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by National Institute of Advanced Industrial Science and Technology AIST, Sumitomo Chemical Co Ltd, University of Tokyo NUC filed Critical National Institute of Advanced Industrial Science and Technology AIST
Priority to JP2012130653A priority Critical patent/JP2013016790A/ja
Publication of JP2013016790A publication Critical patent/JP2013016790A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/08—Manufacture or treatment characterised by using material-based technologies using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Thin Film Transistor (AREA)
JP2012130653A 2011-06-10 2012-06-08 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法 Pending JP2013016790A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012130653A JP2013016790A (ja) 2011-06-10 2012-06-08 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2011130728 2011-06-10
JP2011130728 2011-06-10
JP2012130653A JP2013016790A (ja) 2011-06-10 2012-06-08 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法

Publications (1)

Publication Number Publication Date
JP2013016790A true JP2013016790A (ja) 2013-01-24

Family

ID=47295793

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012130653A Pending JP2013016790A (ja) 2011-06-10 2012-06-08 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法

Country Status (3)

Country Link
JP (1) JP2013016790A (fr)
TW (1) TW201310580A (fr)
WO (1) WO2012169210A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9064959B2 (en) * 2013-03-13 2015-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus for forming a CMOS device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59198750A (ja) * 1983-04-25 1984-11-10 Seiko Epson Corp 半導体装置
JPS63311768A (ja) * 1987-06-13 1988-12-20 Fujitsu Ltd 相補型半導体装置の製造方法
JP2830144B2 (ja) * 1989-08-28 1998-12-02 日本電気株式会社 半導体装置
JPH03109740A (ja) * 1989-09-25 1991-05-09 Hitachi Ltd 半導体装置
US6563143B2 (en) * 1999-07-29 2003-05-13 Stmicroelectronics, Inc. CMOS circuit of GaAs/Ge on Si substrate
JP4116990B2 (ja) * 2004-09-28 2008-07-09 富士通株式会社 電界効果型トランジスタおよびその製造方法
JP4940682B2 (ja) * 2005-09-09 2012-05-30 富士通セミコンダクター株式会社 電界効果トランジスタおよびその製造方法

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WO2012169210A1 (fr) 2012-12-13
TW201310580A (zh) 2013-03-01

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