JP7494842B2 - ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法 - Google Patents

ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法 Download PDF

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Publication number
JP7494842B2
JP7494842B2 JP2021516269A JP2021516269A JP7494842B2 JP 7494842 B2 JP7494842 B2 JP 7494842B2 JP 2021516269 A JP2021516269 A JP 2021516269A JP 2021516269 A JP2021516269 A JP 2021516269A JP 7494842 B2 JP7494842 B2 JP 7494842B2
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Japan
Prior art keywords
chip
support piece
film
forming
piece
Prior art date
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JP2021516269A
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English (en)
Japanese (ja)
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JPWO2020218524A1 (ko
Inventor
達也 矢羽田
紘平 谷口
慎太郎 橋本
義信 尾崎
圭 板垣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
Resonac Corp
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Application filed by Hitachi Chemical Co Ltd, Showa Denko Materials Co Ltd, Resonac Corp filed Critical Hitachi Chemical Co Ltd
Publication of JPWO2020218524A1 publication Critical patent/JPWO2020218524A1/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Die Bonding (AREA)
  • Dicing (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP2021516269A 2019-04-25 2020-04-24 ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法 Active JP7494842B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPPCT/JP2019/017733 2019-04-25
PCT/JP2019/017733 WO2020217411A1 (ja) 2019-04-25 2019-04-25 ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法
PCT/JP2020/017729 WO2020218524A1 (ja) 2019-04-25 2020-04-24 ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法

Publications (2)

Publication Number Publication Date
JPWO2020218524A1 JPWO2020218524A1 (ko) 2020-10-29
JP7494842B2 true JP7494842B2 (ja) 2024-06-04

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JP2021516269A Active JP7494842B2 (ja) 2019-04-25 2020-04-24 ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法

Country Status (6)

Country Link
JP (1) JP7494842B2 (ko)
KR (1) KR102755201B1 (ko)
CN (1) CN113574664B (ko)
SG (1) SG11202110094XA (ko)
TW (1) TWI830905B (ko)
WO (2) WO2020217411A1 (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7707607B2 (ja) * 2021-03-30 2025-07-15 株式会社レゾナック 支持部材の製造方法、及び、半導体装置の製造方法
KR102698797B1 (ko) * 2021-12-14 2024-08-26 (주)이녹스첨단소재 스페이서용 필름 및 이를 이용한 스페이서 형성 방법

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006005333A (ja) 2004-05-20 2006-01-05 Toshiba Corp 積層型電子部品とその製造方法
JP2014082498A (ja) 2013-11-11 2014-05-08 Nitto Denko Corp ダイシング・ダイボンドフィルムの製造方法
JP2017515306A (ja) 2014-04-29 2017-06-08 マイクロン テクノロジー， インク． 支持部材を有する積層半導体ダイアセンブリと、関連するシステムおよび方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002222889A (ja) * 2001-01-24 2002-08-09 Nec Kyushu Ltd 半導体装置及びその製造方法
KR20030018204A (ko) * 2001-08-27 2003-03-06 삼성전자주식회사 스페이서를 갖는 멀티 칩 패키지
US6930378B1 (en) * 2003-11-10 2005-08-16 Amkor Technology, Inc. Stacked semiconductor die assembly having at least one support
TWI292617B (en) * 2006-02-03 2008-01-11 Siliconware Precision Industries Co Ltd Stacked semiconductor structure and fabrication method thereof
JP4954569B2 (ja) * 2006-02-16 2012-06-20 日東電工株式会社 半導体装置の製造方法
US20080029885A1 (en) * 2006-08-07 2008-02-07 Sandisk Il Ltd. Inverted Pyramid Multi-Die Package Reducing Wire Sweep And Weakening Torques
JP4976522B2 (ja) * 2010-04-16 2012-07-18 日東電工株式会社 熱硬化型ダイボンドフィルム、ダイシング・ダイボンドフィルム、及び、半導体装置の製造方法
JP5840479B2 (ja) * 2011-12-20 2016-01-06 株式会社東芝 半導体装置およびその製造方法
KR101906269B1 (ko) * 2012-04-17 2018-10-10 삼성전자 주식회사 반도체 패키지 및 그 제조 방법
JP2015176906A (ja) * 2014-03-13 2015-10-05 株式会社東芝 半導体装置および半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006005333A (ja) 2004-05-20 2006-01-05 Toshiba Corp 積層型電子部品とその製造方法
JP2014082498A (ja) 2013-11-11 2014-05-08 Nitto Denko Corp ダイシング・ダイボンドフィルムの製造方法
JP2017515306A (ja) 2014-04-29 2017-06-08 マイクロン テクノロジー， インク． 支持部材を有する積層半導体ダイアセンブリと、関連するシステムおよび方法

Also Published As

Publication number Publication date
TWI830905B (zh) 2024-02-01
SG11202110094XA (en) 2021-11-29
KR20220002258A (ko) 2022-01-06
WO2020217411A1 (ja) 2020-10-29
CN113574664A (zh) 2021-10-29
TW202107669A (zh) 2021-02-16
JPWO2020218524A1 (ko) 2020-10-29
CN113574664B (zh) 2025-12-12
KR102755201B1 (ko) 2025-01-14
WO2020218524A1 (ja) 2020-10-29

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