JPH01100773A - Analog reproduction circuit for digital data - Google Patents

Abstract

PURPOSE:To reproduce an analog signal without generating jitter by providing a buffer memory of first-in first-out system, and controlling the driving speed of a recording medium by outputting a reproducing speed control command from a speed control circuit to a servo circuit corresponding to the data storing quantity of the buffer memory. CONSTITUTION:The driving speed (reproducing speed) of the recording medium 1 is controlled positively by providing a FIFO buffer memory 14 just before a D/A conversion circuit 10 and outputting the reproducing speed control command from the speed control circuit 15 to the servo circuit 12 corresponding to the data storing quantity of the FIFO buffer memory 14. In other words, the reproducing speed is decreased as the data storing quantity of the FIFO buffer memory 14 is increased, and adversely, the reproducing speed is increased as the data storing quantity of the FIFO buffer memory 14 is decreased. Therefore, it is possible to prevent the excess or the shortage of data from being generated even when dispersion in the timing of the data reproduced from the reproducing medium 1 is generated due to the nonuniformity of rotation, etc. In such a way, reproduction without generating the jitter can be realized.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to digital audio tape recorders (Digital audio tape recorders).
The present invention relates to an analog playback circuit for digital data suitable for use as a playback system for digital audio such as AT.

[Prior art] Figure 2 is, for example, from Nikkei Electronics No. 424, No. 19.
5 (published on June 29, 1987) is a block diagram showing an analog playback circuit for digital data as an example of a playback system of a digital audio tape recorder, and in the figure, l indicates a circuit for recording digital data. Magnetic tape as a recording medium.

2 is a playback head for playing back the digital data recorded on the magnetic tape 1, 3 is a playback amplifier, 4 is a data demodulation circuit, and 5 is a phase synchronizer for extracting a playback clock from the output signal of the playback amplifier 3. A loop circuit, 6 and 8 are buffer memories, 7 is an error detection and correction circuit, and playback head 2
．． Reproduction amplifier 3° data demodulation circuit 49 phase locked loop circuit 5. Buffer memory 6.8 and error detection and correction circuit 7
A digital data reproducing circuit 13 is configured.

Further, 9 is a D/A interface circuit for extracting and serially converting data from the buffer memory 8 at playback timing, and 10 is a D/A conversion circuit for converting the output of the D/A interface circuit 9 into an analog signal. , 11 is a clock generation circuit for generating reproduction timing, 12
is a servo circuit that performs constant speed control of the tape running system.

Next, the operation will be explained.

The magnetic tape 1 is driven by a servo circuit 12 to a reproduction head 2. The digital reproduction signal reproduced through the reproduction amplifier 3 is data demodulated by the data demodulation circuit 4 and the phase-locked loop circuit 5 and stored in the buffer memory 6, and then subjected to error detection and correction by the error detection and correction circuit 7. Once stored in the buffer memory 8, the D/A interface circuit 9 and the D/A converter circuit 10 perform D/A conversion based on the basic reproduction timing from the clock generation circuit 11.
/A conversion and output as an analog audio signal.

[Problems to be Solved by the Invention] Since the conventional analog playback circuit for digital data is configured as described above, the tape running system servo circuit 1
2, if the digital data reproduction timing reproduced from the magnetic tape 1 and the basic reproduction timing of the clock generation circuit 11 completely match, no problem will occur, but due to uneven rotation of the tape, etc. If the timing of the reproduced data varies, the variation can be absorbed to some extent by the buffer memory 8, but if the data varies for a period exceeding the buffer memory capacity, there will be excess or deficiency in the data, and the data will not be reproduced or output. There was a problem in that distortion (data jitter) occurred in the analog audio signal.

This invention was made in order to solve the above-mentioned problems, and even if the timing of data reproduced from a recording medium varies due to one rotation unevenness, etc., it prevents excess or deficiency of data from occurring and reproduces the final result. This prevents the analog playback signal that is output from being affected, achieving playback with absolutely no jitter.

The purpose is to obtain an analog reproduction circuit for digital data.

[Means for Solving the Problems] The digital data analog reproducing circuit according to the present invention has the digital data reproducing circuit between the digital reproducing circuit and the D/A converter circuit at the digital data reproducing timing in the digital data reproducing circuit. A first-in, first-out buffer memory (hereinafter referred to as FIFO) that writes digital data from the circuit and reads it at the basic playback timing in the D/A conversion circuit.
rst-InF 1rst-Out) buffer memory] and outputs a reproduction speed control command to the servo circuit according to the amount of data stored in the buffer memory to control the driving speed of the recording medium. It is equipped with a circuit.

[Function] In the analog reproduction circuit for digital data according to the present invention, a FIFO buffer memory is provided immediately before the D/A conversion circuit, and the reproduction speed is controlled from the speed control circuit to the servo circuit according to the amount of data stored in the FIFO buffer memory. A control command is output to actively control the drive speed (playback speed) of the recording medium. In other words, when the amount of data stored in the FIFO buffer memory increases, the playback speed is slowed down, and vice versa.
When the amount of data stored in the O buffer memory decreases, the playback speed is increased. As a result, even if the timing of data reproduced from the recording medium varies due to uneven rotation, etc., there will be no excess or deficiency of data.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. 1st
The figure is a block diagram showing the circuit of this embodiment. In this embodiment as well, a case where this circuit is applied to a reproduction system of a digital audio tape recorder will be explained as in the conventional case. Incidentally, in FIG. 1, the same reference numerals as those already described indicate the same or corresponding parts, so the explanation thereof will be omitted.

In FIG. 1, 14 is a FIFO buffer memory, which is provided between the digital reproduction circuit 13 (buffer memory 8) and the D/A conversion circuit 10 (D/A interface circuit 9). This FIF○ buffer memory 14 is written with digital data from the digital playback circuit 13 at a timing corresponding to the digital data playback timing in the digital data playback circuit 13, that is, at a timing corresponding to the playback speed of the magnetic tape 1. The written data is read out at the basic reproduction timing, that is, at the timing corresponding to the clock generated by the clock generation circuit 11.

A speed control circuit 15 manages the amount of data stored in the FIFO buffer memory 14 and outputs a reproduction speed control command to the servo circuit 12 of the tape running system according to the amount of data stored, thereby driving the magnetic tape 1. It controls the speed,
Specifically, when the amount of data stored in the FIFQ buffer memory 14 increases, the playback speed is slowed down, and conversely, when the amount of data stored in the FIFO buffer memory 14 decreases, the playback speed is increased.

Next, the operation of the digital data analog reproduction circuit of this embodiment will be explained.

Initially, at the start of operation, the FIFO buffer memory 14
No data is stored at all, so that the speed control circuit 15 outputs a speed command slightly faster than the basic playback timing to the servo circuit 12 of the tape running system. Then, as in the conventional case, the data recorded on the magnetic tape 1 is transferred to the reproducing head 2. It is reproduced as a digital reproduction signal through the reproduction amplifier 3, and then sent to the data demodulation circuit 4 and the phase-locked loop circuit 5.
After the data is demodulated and stored in the buffer memory 6, it is subjected to error detection and correction in the error detection and correction circuit 7, and is temporarily stored in the buffer memory 8.

Next, in this embodiment, the data stored in the buffer memory 8 is transferred to the FIFO at the digital data reproduction timing.
Once written in the buffer memory 14, it is read out at the basic reproduction timing from the clock generation circuit 11,
D/A interface circuit 9 and D/A conversion circuit 10
The signal is D/A converted, and is normally reproduced and output as an analog audio signal.

At this time, in FIFO buffer memory 1.4,
Since the write timing has a slightly higher frequency than the read timing, data is gradually accumulated, and eventually reaches a predetermined accumulation amount. When this predetermined accumulation amount is exceeded, the speed control circuit 15 sends the basic reproduction timing to the servo circuit 12. A slightly slower speed command is output. As a result, the amount of data stored in the FIFO buffer memory 14 decreases. When the amount of data stored in the FIF○ buffer memory 14 falls below a predetermined amount, the speed control circuit 15 again outputs a speed command slightly faster than the basic reproduction timing to the servo circuit 12 in the same way as at the start of operation, and the amount of data stored in the FIF○ buffer memory 14 is increase.

Thereafter, by repeating the same operation, an analog audio signal completely free of jitter is reproduced.

Furthermore, if during the above-described playback operation, uneven tape rotation occurs and the number of tape rotations decreases, the effect will appear as a decrease in the amount of data stored in the FIFO buffer memory 14, so please be careful. When the accumulated amount falls below a certain amount, as described above, the speed control circuit 15 outputs a speed command slightly faster than the basic playback timing to the servo circuit 12, and a correction operation is performed for a decrease in the tape rotation speed due to rotational unevenness, etc. . Such a correction operation is also carried out by outputting a slower speed command even when the tape rotational speed increases due to uneven rotation or the like.

In this way, even if there are variations in the timing of data reproduced from the magnetic tape 1 due to uneven rotation of the tape, there will be no excess or deficiency of data, and it is possible to reproduce analog audio signals with no jitter at all. .

In the above embodiment, the case where the circuit of the present invention is applied to the playback system of a digital audio tape recorder has been described, but the present invention can be similarly applied to the playback system of other digital audio such as a compact disc (CD). The same effect as in the above embodiment can be obtained.

[Effects of the Invention] As described above, according to the present invention, a first-in, first-out buffer memory is provided, and a reproduction speed control command is output from the speed control circuit to the servo circuit according to the amount of data stored in the buffer memory, thereby actively controlling the playback speed. Since the drive speed of the recording medium is controlled automatically, even if the timing of data reproduced from the recording medium varies due to uneven rotation of the tape, there will be no excess or deficiency of data, and there will be no jitter at all. This has the effect of realizing analog signal playback without noise.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a digital data analog reproducing circuit according to an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional digital data analog reproducing circuit. In the figure, 1...-magnetic tape as a recording medium, 1
0-D'/A conversion circuit, 12-servo circuit, 13-・
-Digital playback circuit, 14-First-in, first-out system (FI
FO) buffer memory, 15--speed control circuit. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] While driving the recording medium on which digital data is recorded at a predetermined speed by a servo circuit, a digital data reproducing circuit reproduces the digital data from the recording medium,
In an analog reproduction circuit for digital data that converts a reproduced digital reproduction signal into an analog signal by a D/A conversion circuit and outputs the analog signal, the digital data reproduction circuit is connected between the digital reproduction circuit and the D/A conversion circuit. A first-in, first-out buffer memory is provided in which digital data is written from the digital reproduction circuit at the digital data reproduction timing in the D/A conversion circuit and read at the basic reproduction timing in the D/A conversion circuit, and the data in the buffer memory is 1. An analog playback circuit for digital data, comprising a speed control circuit that controls the drive speed of the recording medium by outputting a playback speed control command to the servo circuit according to the amount of storage.