JPH01105111A - recorder - Google Patents

Abstract

PURPOSE:To display a previous image again by operating an image return indicating means and tracing addresses back in reverse time series from a cyclic buffer memory. CONSTITUTION:An A-D converter 10 converts an input from a channel into digital input data and a dot data input means 38 samples the input data in time series to generate dot data, which are written in the cyclic buffer memory 20 repeatedly at intervals of a constant number of samples while its addresses are rewritten. Here, the memory 20 has its write and read addresses cyclically and a dot data output means 40 determines the read address behind the write address, reads the memory 20 repeatedly while changing addresses, and displays dot data on the screen of a display 24. Further, a return image output means 42 traces the addresses of the memory 20 back in reverse time series through the operation of an operation part 14, constitutes a previously displayed image in dot matrix again, and displays it on the display 24.

Description

[Detailed Description of the Invention] Industrial Field of Application The present invention is applicable to recorders that digitize analog inputs such as current and voltage, sample them at high speed, and display them as dots on a display screen. Concerning what can be displayed and observed.

Conventional technology Conventionally, high-speed sampling recorders sample analog input data using an A-D converter at intervals of, for example, 1m5ec, create dot data from the input data, and output it to a printer with a dot matrix configuration in almost real time. Waveforms, etc. are printed as dots on the recording paper, or output to a display with a dot matrix configuration, and the waveforms, etc. are displayed as dots on the screen. In this case, there are methods that show the sampling points of analog input data as dots directly on the recording paper or screen, and methods that interpolate between the points and show them as lines. You can make a recorder with good performance.

Problems to be Solved by the Invention However, many such recorders do not store previous waveforms, and therefore cannot observe the same waveform again except for the portion that remains on the display screen. Furthermore, even if the previous waveform is stored, the memory capacity is limited. For this reason, even with high-speed sampling recorders, 1v
With the usual method of storing samples in memory as one word, the waveform can be recorded for a long time by slowing down the recording paper, but the waveform is only stored for a fraction of the length of the paper. For example, if the sampling period is 1m5eC and the memory capacity is 64 words, the storage time will be approximately 65 seconds, so the paper feed range will be set to IDIV/rT1i.
When set to n, only 1 DIV of waveforms can be stored.

Particularly when using a recorder with a display and observing waveforms only on the display screen without printing them, it is inconvenient that you cannot see even the waveforms from a while ago.

The present invention has been made in view of these conventional problems, and it is an object of the present invention to provide a recorder that can display the previous screen again.

Means for Solving the Problems Means for achieving the above object will be explained below using FIG. 1 showing the present invention.

The input section of this recorder includes an A-D converter 10 for converting analog input data into digital input data, and an operation section 14 having screen return instruction means for returning to a previously displayed screen. The dot data is created from input data sampled in chronological order through a circular buffer memory 20 which is assigned addresses corresponding to the dot matrix screen of the display 24 and has write and read addresses arranged in a circular manner. , a dot data input means 38 that repeats writing by changing the address of the circular buffer memory 20 every fixed sampling number or fixed time; and a dot data input means 38 that sets the read address at an address after the write address and changes that address from the circular buffer memory 20. dot data output means 40 which repeats reading and displays dot data on the screen of the display 24; and return screen output means 42 which returns the addresses from the circular buffer memory 20 in reverse chronological order by operating the screen return instruction means. The output section is equipped with a display 24 for displaying a screen composed of a dot matrix.

action The above means works as follows.

Analog input data coming from the channels is converted to digital input data by an 8-0 converter 10.

In this way, the dot data input means 38 creates dot data from the input data sampled in time series, and inputs the dot data to the circular buffer 7 at a fixed number of samplings or at fixed time intervals.
The address of the memory 20 is changed and writing is repeated. In addition,
Addresses corresponding to the dot matrix screen of the display 24 are assigned to the circular buffer memory 20, and write and read addresses are configured cyclically. The dot data output means 40 sets the read address from the circular buffer 1 memory 20 at an address after the write address, changes the address and repeats reading, and displays the dot data on the screen of the display 24.

Further, the return screen output means 42 returns the addresses from the circular buffer memory 20 in reverse chronological order by operating the screen return instruction means. Therefore, the previously displayed screen is displayed again. The display 24 displays a screen composed of a dot matrix.

Example Hereinafter, the present invention will be described in detail based on the accompanying drawings.

FIG. 2 is a block diagram showing the configuration of a recorder to which the present invention is applied. In the figure, reference numerals 10, 12, and 14 are an A-D converter, a timer, and an operation section in the input section of the recorder. This A
-D converter 10 has, for example, an 8-bit configuration, and converts analog input data such as current, voltage, power, etc. input from channel 16 into digital input data. At that time, timer 1
2 generates an interrupt signal every '1m5ec to start an interrupt routine in order to sample input data from the A/D converter 10. The operation unit 14 also includes a start switch for starting displaying the screen as an instruction means;
There is a stop switch that stops displaying the screen, a backward screen return switch that returns the display to the previous screen, and a front screen return switch that returns the display from that screen to the previous screen, and each key is provided to operate them. The input data sampled in chronological order in this manner enters a device 18 equipped with a CPU, where dot data is created from the input data, and processing necessary for printing and screen display, such as writing it into memory, is performed. A device equipped with this CPU @18
A circular buffer memory for storing dot data, such as a RAM 20 dedicated to storing dot data, a printer such as a dot printer 22 for printing the dot data read out from the buffer 7 memory 20, and a display for displaying the dot data, such as a CRT display 24. etc. are connected to each other.

The device 18 equipped with the CPU described above includes, for example, a CPU (central processing unit) 26 and a ROM (read-only memory) 28.
, a RAM (readable/writable memory) 30, an input port 32, an output port 34, a pass line 36, and the like. Its CP
U26 corresponds to the central brain section of the microcomputer, and executes overall control according to program instructions, performs arithmetic and logical operations, and temporarily stores the results. It also controls peripheral devices. The ROM 28 stores a control program for controlling the entire recorder, an input data processing program, and the like. Further, the RAM 30 stores data such as calculation results of the CPU 26.

The input port 32 is connected to an A-D converter 10, a timer 12, an operation section 14, and the like. Further, a printer 22, a CRT display 24, etc. are connected to the output port 34. The path line 36 includes an address bus line, a data bus line, a control path line, etc. for connecting these, and is also connected to the RAM 20 dedicated to dot data storage. Note that this RAM 20 is allocated to the address space of the CPU 26.

The dot printer 22 is a dot matrix printer equipped with a line-type thermal recording head that can print by moving the recording paper one dot line at a time. This thermal recording head has dot positions along one line from number 1 to number X, for example number 256, indicating the amount of input data. Therefore, the vertical axis corresponding to 256 dots on the recording paper is the voltage axis, and the horizontal axis corresponding to the paper feeding direction is the time axis. For example, the paper feeding speed is set to 10 sec/DIV, and the 1 DIV
If the number of dots in each printer 22 is set to 50,
Since the speed per one dot line is 200 m5ec, sampling can be performed 200 times per one dot line, and a waveform as shown in FIG. 3 can be printed as dots. Incidentally, instead of the number of samplings, a sampling time may be assigned to such writing per dot line.

Similarly, the screen of the CRT display 24 is composed of a dot matrix, for example, 256 dots x 512 dots. However, 512 dots are on the horizontal axis and indicate the number of dot lines. This CRT display 24 is a video RA
Including M and CRT controller. Note that instead of the CRT display 24, an LCD display or the like that displays a screen configured with a dot matrix may be used.

Therefore, the RAM 20 dedicated to dot data storage has, for example, 6
4 with a byte capacity, and addresses are assigned thereto in correspondence with the dot matrix screen of the CRT display 24. That is, as shown in FIG.
One unit of memory is made up of 256 bits (one bit line) corresponding to one dot line made up of dots. This corresponds to 32 bytes, so 64 bytes equals 204 bytes.
A circular buffer memory can be constructed in which write and read addresses indicated by hexadecimal numbers of 8-bit lines are used cyclically. By the way, 1 byte corresponds to 8 bits, so 256
Dividing bits by 8 bits gives 32 bytes, and 64 bytes actually equals 65536 bits, so 6553
Dividing 6 bits by 32 bytes gives 2048 bit lines. Note that the number of bit lines must naturally be greater than the number of dot lines on the screen of the display 24. To write dot data created from input data to the circular buffer memory 20, for example, first input from address 10000H to address 1001FH, and then after inputting dot data from address 10020H to 1003FH.
It is used cyclically by inputting data up to the address, then changing the bit line and repeating the same input, and when it reaches address 1FFEO1-1, it returns to address 10000H.

At this time, for each bit line, for example from address 100OOH to address 1001FH, if the sampled input data is O as shown in Figure 5, the bit of bO at address 10000H is set to "1" according to the dot data created from that input data. , and if the input data is 255, then 1
Similarly, set bit b7 of 001FHI to “1pa”.

Incidentally, in order to fill in and interpolate the dots between sampling points on the screen to create a line representation, it is necessary to create and write interpolated data from input data.

Further, in order to read from the circular buffer memory 20, the read address is set at an address after the write address, and the read is repeated by changing the address in the same manner.

Next, the operation of this embodiment will be explained.

FIG. 6, FIG. 7, and FIG. 8 are flowcharts consisting of steps P1 to P23 showing an example of an input data processing program. To run this program,
First, select 10000H~' of the circular buffer memory 20 using Pl.
Set O to all addresses of 1FFFFH, set O to all addresses of the video RAM included in the CRT display 24, and set the sampling number per bit line DATA.
Set to O. Next, go to P2, set the write (input) address IN of the circular buffer 7 memory 20 to address 10000H, and set the read (output) address OLJ T to 10000H.
Set to street address. Next, go to P3 and enable interrupts. Thereafter, the CPtJ 26 starts accepting sampling, and accordingly enters the interrupt routine shown in FIG. 7 in response to an interrupt signal every 1 m5 eC from the timer 12.

In this interrupt routine, first, at P31, the A-D converter 10
Enter data from. Next, the process goes to P32, where the input data is converted into dot data and written one time from the write address IN to the 32-byte bit line. Note that the starting address of each bit line is an address that represents that bit line. Next, go to P33, add 1 to DATA to create a new ATA, and go to P34 (.In P34, DATA
A is the set sampling number per bit line 20
Determine whether it is 0 or more.

If NO, the main program returns to the location where the interrupt occurred. When an interrupt occurs again, the process goes through steps P31 to P33 and then makes the determination at p34. Thereafter, when the input data is sampled 200 times, all writing per bit line is completed and YES is determined at P34, so the process goes to P35 and DATA is set to 0. Next, go to p3B, advance the write address IN by one bit line in preparation for the next similar process, and return to the main program.

In this way, dot data is created from the input data sampled in time series and stored in the circular buffer memory 2.
Change the address IN of 0 and repeat writing.

At P4, it is determined whether the stop switch key on the operation section 14 has been pressed. If NO, go to P5. At P5, it is determined whether the write address IN is equal to the read address OUT. Note that the read address OUT is the write address IN.
Set the address one bit line after. No
In this case, go to P6 and send the read address O to the printer 22.
Outputs 1 bit line from UT. Therefore, one dot line is printed on the recording paper of the printer 22.

Next, go to Pl and set the screen of the CTR display 24 to 1.
Scroll (move) the dot line to the left and go to P8.

At P8, 1 bit line (32 bytes) is output from the read address 0LJT to the 1 dot line at the right end of the screen. In other words, one bit line worth of dot data is transferred to the video RA.
Write in M.

Next, the process goes to P9, advances the read address OUT by one bit line in preparation for the next similar process, and returns to P4. After making the determinations in P4 and P5 again, steps P6 to P9 are repeated. In this way, read address OUT
is set at an address after the write address IN, and the dot data is read out repeatedly from the circular buffer memory 20 by changing the address OUT, printed on the recording paper of the printer 22, and displayed on the screen of the CRT display 24. go.

If YES in the previous P4, go to PIO and disable interrupts. Next, go to Pll and read the normal read address OUT
A new read address 0LJT2 is set to an address 513 bit lines back from the address.

Next, go to Pl2 and determine if there is a new key personnel,
If YES, the process goes to Pl3 and determines the type of the key. For the rear screen return switch key (→), press P.
Go to l4, read address 0LIT2 becomes write address I
Determine whether it is equal to N. Note that this judgment is based on the circulation buffer 7.
This is a process that prevents the memory 20 from being output for more than one round. If no, go to P15 and CRT display 2
Scroll the screen in step 4 one dot line to the right. Then P
16, and outputs 1 bit line from read address 0UT2 to the 1 dot line at the left end of the screen. That is, 1
Dot data for a bit line is written into the video RAM. Next, P17 is added and the read address 0UT2 is moved backward by one bit line in preparation for the next similar process. Next, go to Pl8, move the normal read address OUT backward by one bit line in preparation for the next similar process, and
Return to 2. After the judgment of P12, Pl3, and Pl4 again,
Repeat steps P15 to P18. In this way, by keying the screen return switch, the readout address 0UT2 is returned to an address one screen after the normal readout address OUT, and then the readout is repeated by changing the address 0UT2 from the circular buffer memory, and the CRT display Dot data indicating the previous screen is displayed on the screen of 24.

If the front screen return switch key (←) is pressed at P13, the process goes to P19 and it is determined whether the normal read address OUT is equal to the write address IN. Note that this determination is also a process for preventing output from the circular buffer memory 20 for more than one round. If NO, go to P2O and scroll the screen of the CRT display 24 one dot line to the left. Next, go to P21 and go to the one-dot line at the right end of the screen.
Outputs one bit line from read address OUT. That is, dot data for one bit line is written into the video RAM. Next, go to P22 and read address 0U
Advance T2 forward by one bit line in preparation for the next similar process. Next, go to P23 and read the normal read address OUT.
is advanced by one bit line in preparation for the next similar process, and returns to P12. After the determinations of P12, P13, and P19 are made again, steps P20 to P23 are repeated.

If Pl3 is the start switch key, go to Pl. Here, the information displayed on the screen at the time of each operation of the start switch key (start), the stop switch key (stop), the rear screen return switch key (→), and the front screen return switch key (←) described above. An example of correspondence with waveform movements is shown in FIG. In this way, when you press the start switch key on the screen (A) where no waveform is displayed, the waveform will be displayed as shown on the screen (B), and the waveform will change as shown on the screen (C) and (D). do. but,
When you press the stop switch key, the waveform stops as shown in the screen (e).

Next, pressing the → key returns to the waveform display on the previous screen as shown in screen (g), and when the key is held down, the screen returns to the waveform display on the previous screen as shown in screen (g). Therefore, if the ← key is pressed, the screen returns to the waveform display in the opposite direction as shown in screen (H), and if the key is kept pressed, the waveform display returns to the waveform display in the screen in the further opposite direction as shown in screen (S). As a result, the waveform can be easily observed by returning to the previous screen as appropriate.

In addition, in the above embodiment, each address was made up of 8 bits, but
With a 256-bit configuration, it is only necessary to assign an address to each bit line.

Further, in the above embodiment, the circular buffer memory is used exclusively for storing dot data that depicts waveforms such as voltage, but a separate buffer memory for outputting to a printer or the like may be provided.

For example, data for storage may be dedicated to waveforms, and data for output may be buffered including comment characters. Further, in addition to waveforms, dot data such as comment characters may also be stored in the circular buffer memory.

Further, in the above embodiment, output processing is performed for each bit line, but depending on hardware considerations, output processing may be performed for a plurality of lines at once.

Further, in the above embodiment, a RAM is used as the circular buffer memory, but a floppy disk or the like may also be used.

Further, in the above embodiment, the operation section is provided with a start switch, a stop switch, etc., but these are not essential and may be processed by a program.

According to the present invention, which has been described in detail, input data such as waveforms can be easily observed by returning to the previous screen as appropriate.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a recorder according to the present invention. FIG. 2 is a block diagram showing the configuration of a recorder to which the present invention is applied. FIG. 3 is a diagram showing an example of printing an input waveform in a dot matrix configuration by the same recorder, FIG. The figure shows the write state for one bit line. FIG. 6, FIG. 7, and FIG. 8 are flowcharts showing the input data processing program adopted in the recorder. Figure 9 shows the timing of each key operation on the same recorder and the CRT.
FIG. 6 is a diagram illustrating an example of correspondence with the movement of waveforms displayed on the screen of a display. 10...A-D converter 12...Timer 14...
・Operation unit 18...equipment with CPU @ 20...
Circulating buffer 7 memory 22... printer 24...
Display 26...CPU 38...Dot data input means 40...Dot data output means 4
2... Return screen output means

Claims (1)

[Claims] A converting analog input data to digital input data
- A D converter, an operation unit having a screen return instruction means for returning the display to the previous screen, a display that displays a screen composed of a dot matrix, and an address assignment corresponding to the dot matrix screen of the display, and writing. Dot data is created from a circular buffer memory in which reading addresses are configured in a circular manner and input data sampled in time series, and the address of the circular buffer memory is changed every fixed number of samplings or every fixed period of time, and writing is repeated. a dot data input means, a dot data output means for setting a read address at an address after the write address, changing the address from the circular buffer memory and repeating reading, and displaying dot data on a display screen; and a screen return instruction. A recorder comprising return screen output means for returning addresses from a circular buffer memory in reverse chronological order by operating the means.