JPH01109727A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To enable reflow at a low temperature of 900 deg.C or lower, and to prevent the disconnection of a metallic wiring by specifying the concentration of P2O5 and B2O3 in a glass layer constituting an insulating layer. CONSTITUTION:A glass layer containing 1.5mol%-4.0mol% P2O5 and 8mol%-14 mol% B2O3 is incorporated into an insulating layer and the insulating layer is organized. Accordingly, reflow at 900 deg.C or lower is enabled, and not only a normal surface stepped region but also a vertical sidewall in a contact hole section appearing by applying a dry etching method can be inclined gently, thus preventing the disconnection of a metallic wiring.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and a method for manufacturing the same, and particularly to a semiconductor device that can be thermally fluidized at a temperature of 900C or less.
The present invention relates to the composition of a 5i02 film containing boro/phosphorous.

[Conventional technology]

Generally, semiconductor devices are manufactured by forming elements such as transistors, resistors, or capacitors on a substrate, and then going through a process of forming wiring to connect desired elements. Metal is usually used for the above-mentioned wiring, but since metal has poor coverage at stepped portions, it is common to planarize the underlying insulating film. Conventionally, as a means for flattening, a method has been used in which 5i02 (phosphorus glass) containing a high concentration of phosphorus is heat treated at high temperature and reflowed. but,
A high temperature of about 10,500 ℃ was required for phosphorus glass paste 70-. Recently, there has been an increasing demand for lower heat treatment temperatures in order to realize finer devices, and BPSG films made by adding boron to phosphorus glass have come to be used. The BPSG film has the advantage that it can be reflowed at a temperature of 1000 tll' or less.

Method 1 of manufacturing a semiconductor device using planarization of a BPSG film
An example is described in Japanese Patent Publication No. 59-29137.

[Problem that the invention seeks to solve]

The above conventional technology takes into account the following points:
However, there was a problem that it lacked practicality.

■ B2O3 in BPSG film Pa5s@degree a+
1. There is no description regarding the fixed method.

■ The procedure for opening by performing heat treatment after forming BPSG is stipulated; however, if dry etching is used as the opening means, it is necessary to perform heat treatment to smooth the opening after opening. 9. BPSG films exceeding 9.0% are extremely hygroscopic. There is a problem that boron and phosphorus in the film dissolve and disappear just by immersing it in water, ■ There is no mention of lowering the temperature of heat treatment, and PSG glue 7a
There is no substantial change in the heat treatment temperature compared to case -.

(2) A heat treatment temperature of 1000'C' or more cannot be practically applied to LSIs having the performance of megabit class elements.

An object of the present invention is to provide a BPSG film with a new composition and a method for manufacturing a semiconductor device that takes the above-mentioned problems into account and that enables adhesive flow particularly at 900C or lower.

[Defined means of solving problems]

The above purpose is to reduce P z from 1.5 to 4.0 mol.
This is achieved by using a BPSG film containing Os and 8 to 14 moles of 8103.

The present inventor has conducted various studies to apply BPS-G reflow to semiconductor manufacturing processes. In particular, in order to realize a VLSI having a memory capacity of the recent mega-pit class, it is necessary to suppress the redistribution of the impurity diffusion layer formed in the substrate.

Furthermore, in order to achieve this, it is necessary to suppress the heat treatment applied during the manufacturing process, and the maximum allowable heat treatment conditions for LBPSG glue 70-9001: about 20 minutes. The present inventor has focused on this point and has investigated the relationship between the composition flow of BPSG and various problems that occur during the manufacturing process.

It was found that by suppressing the P 20 s and BzOsm degree within the above concentration range, a glue flow at 900 C can be achieved.
The concentration of s was measured using solution emission spectroscopy (1, C, P, S), and the inventor's experiments using a model 975 manufactured by Jarrell Atsch in the United States revealed the following facts.

■ When heat treatment conditions are the same for PSG and BSG at the same concentration, BSG is 70-easier than PSG, BPS
In the case of G, the higher the B2O3 concentration than the P20s concentration, the easier it will be to 70-. This fact can be easily observed with an SEM (scanning electron microscope). BPSG with a B2O3 concentration of 15 molt or more becomes extremely easy to use, but there are the following problems.

B. Boron absorbs moisture and precipitates on the surface to form IR, which becomes a solid foreign substance (which can be visually confirmed).

However, the solid foreign matter can be removed by immersion in water.

...6 BPSG that has undergone the above mouth treatment is subjected to infrared absorption method,
As a result of analysis using fluorescent X-ray method and solution emission spectroscopy (1, C, P, and SJ), both B2O3 and P2O5 had disappeared from the film.

2. Therefore, washing BPS Gg containing more than 15 moles of BxO3' with water will lead to an extremely inconvenient situation, but washing with water cannot be avoided in the semiconductor manufacturing process, and it is not necessary to wash with water. However, due to the generation of solid foreign matter, it was difficult to apply it to the manufacturing process.

When it is deposited on a base that has a step difference, cracks may occur in the step portion.

F. The adhesion with the resist film during lithography became extremely poor and the fine butter 7 could not be formed.

(2) When the Os concentration was less than 7 molar, it was substantially difficult to realize glue flow at less than 900C.

■ For example, in a C-MO8 circuit, Pz of 5 molar coefficient or more
When a hole communicating with the p+ conductive layer is formed in BPSG containing Os and then step 70 is performed, the phosphorus that escapes from the BPSG forms an ntJi inversion layer on the p99 conductive surface, and then the metal wiring layer Even if a pn junction was formed, electrical conductivity was poor due to the presence of a pn junction.

In order to avoid this problem, we tried forming a thin oxide layer on the conductive surface of the p99 holes, but the 1Q nm oxide layer cannot suppress the intrusion of phosphorus from BPSG containing PzOs with a mole ratio of 5 or more. could not. Considering the manufacturing processes before and after, it is difficult to make the thickness of the oxide layer more than elOnm, and in order to suppress the intrusion of phosphorus with this thickness, it is necessary to It turns out that it needs to be less than molti. The meaning of considering the preceding and succeeding processes here is that, for example, in a C-MO8 circuit, not only the p9 but also the openings communicating with the n0 conductive layer exist simultaneously in the same process, and when forming an oxide layer on the surface. , 9
If the thickness of the 0 surface is 15 nm, the thickness of the n+ coating surface will be about 4Q nm. As a result, a problem arises in that the controllability when removing these oxides is reduced. Strategies for dealing with this problem include the consideration that it is desirable to make the oxide layer thickness at the 99 surface as thin as possible.

■ When the P20g concentration is lower than 1.5 molar concentration, 90
It was substantially difficult to achieve a temperature of 70°C or lower.

■ A hot part is formed by laminating a high melting point metal or its silicide on top of BPSG! When 1t was applied, the BPSG deformed itself in order to relieve the stress of the metal film, and the surface of the metal film became corrugated, making microfabrication difficult.

In order to avoid the problems based on the experimental facts explained above, 900
BPSG containing 1.5 to 4.0 mol of P2O5 and 8 to 14 mol of B2O21 is extremely effective in achieving a glue flow at C or lower. Also.

It has been found that within this composition range, properties equivalent to those of conventional PSG films can be obtained in lithography and dry etching, and that the film has sufficient practicality.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 1(a) to 1(c), in which the manufacturing process of a MOSFET is sequenced.

A thickness of 600 nm for element isolation was formed on the surface of a Si substrate 1 having a p-type (1tlO) plane orientation using Shuho's LOCO8 method.
A S 10 *film 2 was formed. Next, through a preliminary oxidation step, a gate oxide film of 2Q nm in thickness was formed using a normal thermal oxidation method. Next, Mono 7 Jin (SI
Polycrystalline St4 with a thickness of 300 nm was formed using the low pressure chemical vapor deposition method (LPGVD) used in H4)'. Next, using lithography and dry etching, a predetermined region of the polycrystalline 3i is removed, and the polycrystalline St.
Only 4 remained. Resist death and cleaning process 2
! After i--temperature aooc, pressure 0.8 Torr,
Sighs with a thickness of 1QQnm were formed by the LPGVD method using 5IH4 and dinitrogen monoxide (mho)t'' as a reactive gas.Next, / was implanted into the entire surface by the ion implantation method to predetermined areas of the polycrystalline Si4 and Si substrates. The source 6 and the drain 7 were formed by heat treatment at 900C for 30 minutes.Next, BP
The SG film 8 was formed. The device used was an ordinary pressure continuous VD system manufactured by Ohkama Seisakusho. Manufactured by 43 QC, SiH4
40cc/++j+, ;t=Suf(y(Mh) 4
cc/yritt, sibolaf (fhHa)4c
c/m.

Oxygen 30 Q cc/rm thickness is 300 nm
And so.

As a result of analyzing the BPSG film 8 formed under these conditions by inductively coupled plasma emission spectroscopy, values of a BzOs concentration of 13.1 mol % and a P, os concentration of 2.6 mol % were obtained. Also,
As a result of observing the cross section with a scanning electron microscope (SEM), as shown in FIG. 1(a), the coverage of the stepped portion of the polycrystalline Si4 that will become the gate electrode was poor, resulting in an overhung state. It has been known for a long time that if a metal wiring made of aluminum or the like is formed in such a state, it is likely to break at the overhanging stepped portion. In the present invention, after forming the BPSG film 8, a contact hole 9i is formed in the source 6 and V-in 7 regions by photolithography and an anisotropic dry etching method using Freon gas.
, - A contact hole 10 was also formed on the polycrystalline Si4. Although this state is not shown in the figure, according to the results of observation using SnM, the side walls of the contact hole were almost vertical, which was an inconvenient state for metal wiring.

After forming the contact hole, the surfaces of the source 6 and drain 7 exposed in the contact hole 9 and the contact hole 1 are removed through photofung removal and a predetermined cleaning process.
S j Oz of about 1 Qnm is formed on the surface of the polycrystalline 5ilO exposed within 0 by thermal oxidation method. , (not shown). Next, heat treatment was performed at 900C for 20 minutes in an argon (Ar) atmosphere. The cross-sectional shape after the heat treatment was observed by SEM, and the results are shown in FIG. 1(b). The overhangs on the side walls of the contact hole and the stepped portions of the polycrystalline Si4, which were vertical before the heat treatment, disappeared due to the BPSG's own glue 70-, and showed a gentle slope that was extremely convenient for the metal wiring. Next, a 5jOzt layer of approximately 1Qnm was formed in the contact hole using a mixed solution of hydroseptatric acid and ammonium heptafluoride.
- was removed, and titanium nitride (TiN) 11 having a thickness of 2QQnm was formed by sputtering. The conditions were to maintain a mixed gas of Ar and nitrogen at a pressure of 1a+Torr and to set the force density applied between the electrodes to LOW/an''. 34 substrates 1 were installed at a position facing one electrode made of Ti. Next, using lithography and dry etching method, 'l'1N1
A pattern was formed on 1 to form wiring (Fig. 1 (C)
).

According to this embodiment, not only the normal surface step region but also the vertical sidewall of the contact hole portion that appears by applying the dry etching method can be provided with a sufficiently gentle slope, and the lfr of 'rtN, ! It is effective in preventing ii. Also, before performing heat treatment for reflowing %BPSG, the surface of the substrate in contact hole 9 and the surface of polycrystalline Si in contact hole 10 are covered with a 5i (h film. Therefore, heat treatment for reflowing To prevent poor conduction between TiN11 and the source, drain, and polycrystalline Si caused by doping of B, P, or their compounds scattered from BPSG into the substrate surface or polycrystalline Si surface in the contact. In addition, in the lower layer of BPSG8, S
j Since O25 is formed, when forming SiOz on the substrate surface and polycrystalline Si surface in the contact hole and during the subsequent heat treatment, B and P contained in BPSG diffuse into the substrate or polycrystalline Si. It is possible to prevent the conduction defects and characteristic fluctuations from occurring.

In this embodiment, TiN is used for the metal wiring, but the effect is the same even if the metal wiring is made of various silicides such as At or tungsten silicide, or a laminated film of TiN and silicide. In addition, since the concentration of B2O3 is controlled, problems such as the generation of foreign matter due to moisture absorption and the disappearance of B2O3 due to water washing do not occur.Furthermore, although not mentioned in the main text of the example, after TiN cedar formation or when WSi2 and TiN Even when heat treatment was performed after forming the laminated film, no problem such as the surface undulating occurred.

〔Effect of the invention〕

According to the present invention, it is possible to extremely effectively ref-A at a low temperature of 9001:' or lower, which is highly effective in preventing m-rays from metal wiring. In addition, since the adhesive flow is possible at 900C or less, it has little effect on changes in the junction depth of the impurity region pre-formed in the semiconductor substrate, making it possible to reliably manufacture ultra-LSIs that incorporate minute elements. be.

[Brief explanation of the drawing]

Figures 1 (a) to (C) illustrate one embodiment of the present invention.

Claims (1)

[Claims] 1. A semiconductor device that includes at least a structure in which an opening is formed in an insulating layer formed on a semiconductor substrate and a conductor formed on the insulating layer is connected to a conductive layer or a semiconductor substrate under the insulating layer. , the insulating layer contains 1.5 mol% to 4.0 mol% of P_
A semiconductor device comprising at least a glass layer containing 2O_5 and 8 mol% to 14 mol% of B_2O_3. 2. P_2 below the glass layer, below the glass layer
2. The semiconductor device according to claim 1, further comprising an insulating layer with a low content of O_5 or B_2O_3. 3. 1.5 mol% to 4.0 mol% P_ on the semiconductor substrate
2O_5 and a glass layer containing 8 mol% to 14 mol% of B_2O_3 as at least a part of the insulating layer; forming an opening in the insulating layer; and forming a conductive layer exposed by the opening. a step of forming a thin oxide film on the surface of the conductive layer or the semiconductor substrate; a step of smoothing the glass layer by heat treatment; and a step of removing the thin oxide film formed on the conductive layer in the opening or the surface of the semiconductor substrate. ,
A method for manufacturing a semiconductor device, comprising at least a series of steps of forming a conductive thin film. 4. P_2 below the glass layer, below the glass layer
4. The method of manufacturing a semiconductor device according to claim 3, wherein an insulating layer with a low content of O_5 or B_2O_3 is formed. 5. The temperature of the heat treatment when smoothing the glass layer is 90℃.
5. A method of manufacturing a semiconductor device according to claim 3, wherein the temperature is 0° C. or lower.