JPH01111365U - - Google Patents
Info
- Publication number
- JPH01111365U JPH01111365U JP319888U JP319888U JPH01111365U JP H01111365 U JPH01111365 U JP H01111365U JP 319888 U JP319888 U JP 319888U JP 319888 U JP319888 U JP 319888U JP H01111365 U JPH01111365 U JP H01111365U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- data
- control unit
- comparator
- transmission pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Radar Systems Or Details Thereof (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Near-Field Transmission Systems (AREA)
Description
第1図は本考案のデータ通信装置の一実施例に
よる物品識別システムの書込/読出制御ユニツト
の構成を示すブロツク図、第2図はその全体構成
を示すブロツク図、第3図はIDユニツトの構成
を示すブロツク図、第4図はIDユニツトより書
込/読出制御ユニツトに信号を伝送する際の各部
の波形を示すタイムチヤート、第5図は書込/読
出制御ユニツトよりIDユニツトにデータを伝送
する際の各部の波形を示すタイムチヤートである
。
1……書込/読出制御ユニツト、3……IDユ
ニツト、4……制御機器、L1,L2,L3……
コイル、11……クロツク発生器、12……タイ
ムコントローラ、13……送信パルス発生回路、
14……受信ゲート信号発生回路、15……発振
器、17,30……共振回路、19……アナログ
スイツチ、20,31……検波回路、22……サ
ンプルホールド回路、23,24,33……比較
器、25……表示駆動回路、26……発光ダイオ
ード、34……定電圧回路、35……クロツク弁
別回路、36……カウンタ、37……デジタルコ
ンパレータ、38……メモリ制御部、39……メ
モリ、40……残留制御パルス発生器、41,4
2……FET、43……データ復調手段、44…
…残響制御手段。
FIG. 1 is a block diagram showing the configuration of a write/read control unit of an article identification system according to an embodiment of the data communication device of the present invention, FIG. 2 is a block diagram showing the overall configuration, and FIG. 3 is an ID unit. 4 is a time chart showing the waveforms of each part when transmitting a signal from the ID unit to the write/read control unit. Figure 5 is a time chart showing the waveform of each part when transmitting a signal from the ID unit to the write/read control unit. This is a time chart showing the waveforms of each part when transmitting. 1...Write/read control unit, 3...ID unit, 4...Control equipment, L1, L2, L3...
Coil, 11...Clock generator, 12...Time controller, 13...Transmission pulse generation circuit,
14... Reception gate signal generation circuit, 15... Oscillator, 17, 30... Resonance circuit, 19... Analog switch, 20, 31... Detection circuit, 22... Sample hold circuit, 23, 24, 33... Comparator, 25... Display drive circuit, 26... Light emitting diode, 34... Constant voltage circuit, 35... Clock discrimination circuit, 36... Counter, 37... Digital comparator, 38... Memory control unit, 39... ...Memory, 40...Residual control pulse generator, 41,4
2...FET, 43...Data demodulation means, 44...
...Reverberation control means.
Claims (1)
リアルデータの半二重データ伝送を行うデータ通
信装置であつて、 前記書込/読出制御ユニツトは、 前記IDユニツトに対向する面に設けられた第
1のコイルを有する発振器と、 データ送信時には送信データ信号に対応させて
第1、第2のデユーテイ比を有し、データ受信時
には一定の第3のデユーテイ比を有する一定周期
の送信パルス信号を発生し、前記発振器に該一定
周期の送信パルス信号を与えることによつてその
発振を断続する送信パルス発生手段と、 前記発振器の発振周波数に実質的に等しい共振
周波数を有し、前記IDユニツトに対向する面に
設けられた第2のコイルを含む第1の共振回路と
、 前記送信パルス発生手段の送信パルスに対応し
た信号が与えられ前記発振器の発振停止時のタイ
ミングを有する受信ゲート信号を発生する受信ゲ
ート信号発生手段と、 前記受信ゲート信号発生手段の受信ゲート信号
が与えられる間に前記第1の共振回路に得られる
電磁誘導信号を検波する第1の検波回路と、 前記受信ゲート信号の所定タイミングで前記検
波回路の出力をサンプリングするサンプルホール
ド回路と、 前記サンプルホールド回路のホールド信号を所
定レベルで弁別して受信信号を得る第1の比較器
と、 前記検波回路の出力を所定の閾値レベルで弁別
する第2の比較器と、 前記第2の比較器の出力によつて駆動される表
示手段と、を有するものであり、 前記IDユニツトは、 前記書込/読出制御ユニツトの発振器の発振周
波数に実質的に等しい共振周波数を有し前記書込
/読出制御ユニツトに対向する面に設けられた第
3のコイルを含む第2の共振回路と、 前記第2の共振回路に得られる信号を検波する
第2の検波回路と、 前記第2の検波回路の出力を所定の閾値レベル
で弁別することによつて送信パルス信号を得る第
3の比較器と、 前記書込/読出制御ユニツトからのデータ受信
時に前記第3の比較器の出力に基づいて第1、第
2のデユーテイ比の送信パルス信号より送信デー
タ信号を復調するデータ復調手段と、 前記第2の共振回路とアース間に接続されたス
イツチング素子を有し、前記書込/読出制御ユニ
ツトへのデータ伝送時に前記第3の比較器より得
られる第3のデユーテイ比の送信パルス信号に基
づいて前記発振器の発振停止のタイミングで該ス
イツチング素子を送信データに対応させて断続す
ることにより第2の共振回路に生じる残響を制御
する残響制御手段と、を有することを特徴とする
データ通信装置。[Claims for Utility Model Registration] A data communication device that performs half-duplex data transmission of serial data between a write/read control unit and an ID unit, wherein the write/read control unit is opposite to the ID unit. an oscillator having a first coil provided on a surface that transmits data; a transmission pulse generating means that generates a transmission pulse signal with a certain period and intermittents the oscillation by providing the transmission pulse signal with a certain period to the oscillator; A first resonant circuit including a second coil provided on a surface facing the ID unit; and a signal corresponding to the transmission pulse of the transmission pulse generating means are applied to determine the timing when the oscillator stops oscillating. a first detection circuit that detects an electromagnetic induction signal obtained in the first resonant circuit while the reception gate signal of the reception gate signal generation means is applied; , a sample and hold circuit that samples the output of the detection circuit at a predetermined timing of the reception gate signal; a first comparator that discriminates the hold signal of the sample and hold circuit at a predetermined level to obtain a reception signal; a second comparator that discriminates the output at a predetermined threshold level; and a display means driven by the output of the second comparator, the ID unit: a second resonant circuit including a third coil having a resonant frequency substantially equal to the oscillation frequency of an oscillator of the control unit and provided on a surface facing the write/read control unit; a second detection circuit that detects a signal obtained in the circuit; a third comparator that obtains a transmission pulse signal by discriminating the output of the second detection circuit at a predetermined threshold level; /a data demodulating means for demodulating the transmitted data signal from the transmitted pulse signals of the first and second duty ratios based on the output of the third comparator when receiving data from the read control unit; and the second resonant circuit. oscillation of the oscillator based on a transmission pulse signal of a third duty ratio obtained from the third comparator during data transmission to the write/read control unit. 1. A data communication device comprising: reverberation control means for controlling reverberation generated in a second resonant circuit by turning on and off the switching element in accordance with transmission data at a stop timing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP319888U JPH0610456Y2 (en) | 1988-01-13 | 1988-01-13 | Data communication device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP319888U JPH0610456Y2 (en) | 1988-01-13 | 1988-01-13 | Data communication device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01111365U true JPH01111365U (en) | 1989-07-27 |
| JPH0610456Y2 JPH0610456Y2 (en) | 1994-03-16 |
Family
ID=31204615
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP319888U Expired - Lifetime JPH0610456Y2 (en) | 1988-01-13 | 1988-01-13 | Data communication device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0610456Y2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04134933A (en) * | 1990-09-26 | 1992-05-08 | Yamatake Honeywell Co Ltd | Communication equipment |
| JP2010039858A (en) * | 2008-08-06 | 2010-02-18 | Omron Corp | Reader/writer for rfid |
-
1988
- 1988-01-13 JP JP319888U patent/JPH0610456Y2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04134933A (en) * | 1990-09-26 | 1992-05-08 | Yamatake Honeywell Co Ltd | Communication equipment |
| JP2010039858A (en) * | 2008-08-06 | 2010-02-18 | Omron Corp | Reader/writer for rfid |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0610456Y2 (en) | 1994-03-16 |
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