JPH01120351U - - Google Patents

Info

Publication number
JPH01120351U
JPH01120351U JP1431888U JP1431888U JPH01120351U JP H01120351 U JPH01120351 U JP H01120351U JP 1431888 U JP1431888 U JP 1431888U JP 1431888 U JP1431888 U JP 1431888U JP H01120351 U JPH01120351 U JP H01120351U
Authority
JP
Japan
Prior art keywords
semiconductor package
positioning
terminals
positioning terminals
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1431888U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1431888U priority Critical patent/JPH01120351U/ja
Publication of JPH01120351U publication Critical patent/JPH01120351U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a,bは本考案の一実施例を示す図で、
第1図aは半導体パツケージと印刷配線板との関
係を示す斜視図、第1図bは半導体パツケージの
裏面の斜視図、第2図a,bは本考案の他の実施
例を示す図で、第2図aは半導体パツケージと印
刷配線板との関係を示す斜視図、第2図bは半導
体パツケージの裏面の斜視図である。 1,3:半導体パツケージ、2,4:印刷配線
板、10,30:本体、11,31:外部端子、
12:位置決め用端子、13,34:側面、13
b,34b:中心位置、20,40:基材、21
,41:マウントパツド、22,42:凹部。
Figures 1a and 1b are diagrams showing an embodiment of the present invention,
FIG. 1a is a perspective view showing the relationship between a semiconductor package and a printed wiring board, FIG. 1b is a perspective view of the back side of the semiconductor package, and FIGS. 2a and 2b are views showing other embodiments of the present invention. FIG. 2a is a perspective view showing the relationship between the semiconductor package and the printed wiring board, and FIG. 2b is a perspective view of the back side of the semiconductor package. 1, 3: semiconductor package, 2, 4: printed wiring board, 10, 30: main body, 11, 31: external terminal,
12: Positioning terminal, 13, 34: Side, 13
b, 34b: center position, 20, 40: base material, 21
, 41: Mount pad, 22, 42: Recess.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体パツケージの外部端子以外に2本の位置
決め用端子を有し、該位置決め用端子の一方は、
半導体パツケージの側面で、該側面の中心位置よ
りずらした個所に配置され、上記位置決め用端子
の他方は、上記側面と反対の側面における上記一
方の位置決め用端子と対向する位置に配置させ、
また上記半導体パツケージが実装される印刷配線
板には、上記半導体パツケージの2本の位置決め
用端子と対応する位置に、該位置決め用端子の断
面形状に応じて位置決め用の凹部を設け、上記凹
部に上記位置決め用端子を嵌合させることにより
印刷配線板に半導体パツケージを実装することを
特徴とする半導体パツケージの実装構造。
In addition to the external terminals of the semiconductor package, there are two positioning terminals, one of which is
disposed on a side surface of the semiconductor package at a location offset from the center position of the side surface, the other of the positioning terminals being disposed at a position opposite to the one positioning terminal on the side surface opposite to the side surface;
Further, the printed wiring board on which the semiconductor package is mounted is provided with positioning recesses at positions corresponding to the two positioning terminals of the semiconductor package according to the cross-sectional shape of the positioning terminals, and the recesses A mounting structure for a semiconductor package, characterized in that the semiconductor package is mounted on a printed wiring board by fitting the positioning terminals.
JP1431888U 1988-02-05 1988-02-05 Pending JPH01120351U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1431888U JPH01120351U (en) 1988-02-05 1988-02-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1431888U JPH01120351U (en) 1988-02-05 1988-02-05

Publications (1)

Publication Number Publication Date
JPH01120351U true JPH01120351U (en) 1989-08-15

Family

ID=31225410

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1431888U Pending JPH01120351U (en) 1988-02-05 1988-02-05

Country Status (1)

Country Link
JP (1) JPH01120351U (en)

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